Martin D. F. Wong

ORCID

Publication Activity (10 Years)

Years Active: 1988-2024
Publications (10 Years): 90

Top Venues

ICCAD

DAC

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

ASP-DAC

Publications

Qijing Wang, Jinwei Liu, Martin D. F. Wong, Evangeline F. Y. Young
A Multi-agent Generative Model for Collaborative Global Routing Refinement. ACM Great Lakes Symposium on VLSI (2024)
Binwu Zhu, Su Zheng, Ziyang Yu, Guojin Chen, Yuzhe Ma, Fan Yang, Bei Yu, Martin D. F. Wong
L2O-ILT: Learning to Optimize Inverse Lithography Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (3) (2024)
Xinshi Zang, Qin Luo, Zhongwei Shao, Jifeng Zhang, Evangeline F. Y. Young, Martin D. F. Wong
Dynamic Multi-FPGA Prototyping Platforms with Simultaneous Networking, Placement and Routing. ACM Great Lakes Symposium on VLSI (2024)
Martin D. F. Wong
ISPD 2024 Lifetime Achievement Award Bio. ISPD (2024)
Bangqi Fu, Lixin Liu, Yang Sun, Wing Ho Lau, Martin D. F. Wong, Evangeline F. Y. Young
CoPlace: Coherent Placement Engine with Layout-aware Partitioning for 3D ICs. ASPDAC (2024)
Chen Bai, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D. F. Wong
Towards Automated RISC-V Microarchitecture Design with Reinforcement Learning. AAAI (2024)
Siting Liu, Jiaxi Jiang, Zhuolun He, Ziyi Wang, Yibo Lin, Bei Yu, Martin D. F. Wong
Routing-aware Legal Hybrid Bonding Terminal Assignment for 3D Face-to-Face Stacked ICs. ISPD (2024)
Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D. F. Wong
BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration. ACM Trans. Design Autom. Electr. Syst. 29 (1) (2024)
Lixin Liu, Bangqi Fu, Shiju Lin, Jinwei Liu, Evangeline F. Y. Young, Martin D. F. Wong
Xplace: An Extremely Fast and Extensible Placement Framework. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (6) (2024)
Guojin Chen, Zixiao Wang, Bei Yu, David Z. Pan, Martin D. F. Wong
Ultrafast Source Mask Optimization via Conditional Discrete Diffusion. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (7) (2024)
Qijing Wang, Xiaopeng Zhang, Martin D. F. Wong, Evangeline F. Y. Young
ControLayout: Conditional Diffusion for Style-Controllable and Violation-Fixable Layout Pattern Generation. ACM Great Lakes Symposium on VLSI (2024)
Su Zheng, Lancheng Zou, Siting Liu, Yibo Lin, Bei Yu, Martin D. F. Wong
Mitigating Distribution Shift for Congestion Optimization in Global Placement. DAC (2023)
Binwu Zhu, Xinyun Zhang, Yibo Lin, Bei Yu, Martin D. F. Wong
DRC-SG 2.0: Efficient Design Rule Checking Script Generation via Key Information Extraction. ACM Trans. Design Autom. Electr. Syst. 28 (5) (2023)
Guannan Guo, Tsung-Wei Huang, Martin D. F. Wong
Fast STA Graph Partitioning Framework for Multi-GPU Acceleration. DATE (2023)
Shiju Lin, Jinwei Liu, Evangeline F. Y. Young, Martin D. F. Wong
GAMER: GPU-Accelerated Maze Routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (2) (2023)
Ziyang Yu, Peiyu Liao, Yuzhe Ma, Bei Yu, Martin D. F. Wong
CTM-SRAF: Continuous Transmission Mask-Based Constraint-Aware Subresolution Assist Feature Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (10) (2023)
Wenqian Zhao, Yang Bai, Qi Sun, Wenbo Li, Haisheng Zheng, Nianjuan Jiang, Jiangbo Lu, Bei Yu, Martin D. F. Wong
A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (10) (2023)
Wenqian Zhao, Xufeng Yao, Ziyang Yu, Guojin Chen, Yuzhe Ma, Bei Yu, Martin D. F. Wong
AdaOPC: A Self-Adaptive Mask Optimization Framework For Real Design Patterns. CoRR (2023)
Guojin Chen, Zehua Pei, Haoyu Yang, Yuzhe Ma, Bei Yu, Martin D. F. Wong
Physics-Informed Optical Kernel Regression Using Complex-valued Neural Fields. DAC (2023)
Xinshi Zang, Evangeline F. Y. Young, Martin D. F. Wong
SPARK: A Scalable Partitioning and Routing Framework for Multi-FPGA Systems. ACM Great Lakes Symposium on VLSI (2023)
Wenqian Zhao, Qi Sun, Yang Bai, Wenbo Li, Haisheng Zheng, Bei Yu, Martin D. F. Wong
A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU. CoRR (2023)
Xinshi Zang, Lei Chen, Xing Li, Wilson W. K. Thong, Weihua Sheng, Evangeline F. Y. Young, Martin D. F. Wong
CPP: A Multi-Level Circuit Partitioning Predictor for Hardware Verification Systems. ACM Great Lakes Symposium on VLSI (2023)
Su Zheng, Bei Yu, Martin D. F. Wong
OpenILT: An Open Source Inverse Lithography Technique Framework (Invited Paper). ASICON (2023)
Bentian Jiang, Xinshi Zang, Martin D. F. Wong, Evangeline F. Y. Young
Exploring Rule-Free Layout Decomposition via Deep Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (9) (2023)
Zhen Zhuang, Kai-Yuan Chao, Bei Yu, Tsung-Yi Ho, Martin D. F. Wong
Multi-Product Optimization for 3D Heterogeneous Integration with D2W Bonding. ICCAD (2023)
Guannan Guo, Tsung-Wei Huang, Yibo Lin, Zizheng Guo, Sushma Yellapragada, Martin D. F. Wong
A GPU-Accelerated Framework for Path-Based Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Siting Liu, Ziyi Wang, Fangzhou Liu, Yibo Lin, Bei Yu, Martin D. F. Wong
Concurrent Sign-off Timing Optimization via Deep Steiner Points Refinement. DAC (2023)
Su Zheng, Lancheng Zou, Peng Xu, Siting Liu, Bei Yu, Martin D. F. Wong
Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction. ICCAD (2023)
Ziyang Yu, Chen Bail, Shoubo Hu, Ran Chen, Taohai He, Mingxuan Yuan, Bei Yu, Martin D. F. Wong
IT-DSE: Invariance Risk Minimized Transfer Microarchitecture Design Space Exploration. ICCAD (2023)
Su Zheng, Hao Geng, Chen Bai, Bei Yu, Martin D. F. Wong
Boosting VLSI Design Flow Parameter Tuning with Random Embedding and Multi-objective Trust-region Bayesian Optimization. ACM Trans. Design Autom. Electr. Syst. 28 (5) (2023)
Peiyu Liao, Hongduo Liu, Yibo Lin, Bei Yu, Martin D. F. Wong
On a Moreau Envelope Wirelength Model for Analytical Global Placement. DAC (2023)
Guojin Chen, Zehua Pei, Haoyu Yang, Yuzhe Ma, Bei Yu, Martin D. F. Wong
Physics-Informed Optical Kernel Regression Using Complex-valued Neural Fields. CoRR (2023)
Su Zheng, Haoyu Yang, Binwu Zhu, Bei Yu, Martin D. F. Wong
LithoBench: Benchmarking AI Computational Lithography for Semiconductor Manufacturing. NeurIPS (2023)
Qijing Wang, Martin D. F. Wong
WaferHSL: Wafer Failure Pattern Classification with Efficient Human-Like Staged Learning. ICCAD (2022)
Binwu Zhu, Xinyun Zhang, Yibo Lin, Bei Yu, Martin D. F. Wong
Efficient Design Rule Checking Script Generation via Key Information Extraction. MLCAD (2022)
Jinwei Liu, Xiaopeng Zhang, Shiju Lin, Xinshi Zang, Jingsong Chen, Bentian Jiang, Martin D. F. Wong, Evangeline F. Y. Young
Partition and place finite element model on wafer-scale engine. DAC (2022)
Shiju Lin, Jinwei Liu, Tianji Liu, Martin D. F. Wong, Evangeline F. Y. Young
NovelRewrite: node-level parallel AIG rewriting. DAC (2022)
Shiju Lin, Martin D. F. Wong
Superfast Full-Scale CPU-Accelerated Global Routing. ICCAD (2022)
Wenqian Zhao, Xufeng Yao, Ziyang Yu, Guojin Chen, Yuzhe Ma, Bei Yu, Martin D. F. Wong
AdaOPC: A Self-Adaptive Mask Optimization Framework for Real Design Patterns. ICCAD (2022)
Qijing Wang, Bentian Jiang, Martin D. F. Wong, Evangeline F. Y. Young
A2-ILT: GPU accelerated ILT with spatial attention mechanism. DAC (2022)
Xinshi Zang, Fangzhou Wang, Jinwei Liu, Martin D. F. Wong
ATLAS: A Two-Level Layer-Aware Scheme for Routing with Cell Movement. ICCAD (2022)
Lixin Liu, Bangqi Fu, Martin D. F. Wong, Evangeline F. Y. Young
Xplace: an extremely fast and extensible global placement framework. DAC (2022)
Wenqian Zhao, Qi Sun, Yang Bai, Wenbo Li, Haisheng Zheng, Bei Yu, Martin D. F. Wong
A High-Performance Accelerator for Super-Resolution Processing on Embedded GPU. ICCAD (2021)
Tsung-Wei Huang, Yibo Lin, Chun-Xun Lin, Guannan Guo, Martin D. F. Wong
Cpp-Taskflow: A General-Purpose Parallel Task Programming System at Scale. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (8) (2021)
Shiju Lin, Jinwei Liu, Martin D. F. Wong
GAMER: GPU Accelerated Maze Routing. ICCAD (2021)
Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, Martin D. F. Wong
BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration Framework. ICCAD (2021)
Guannan Guo, Tsung-Wei Huang, Yibo Lin, Martin D. F. Wong
GPU-accelerated Path-based Timing Analysis. DAC (2021)
Guannan Guo, Tsung-Wei Huang, Yibo Lin, Martin D. F. Wong
GPU-accelerated Critical Path Generation with Path Constraints. ICCAD (2021)
Fangzhou Wang, Lixin Liu, Jingsong Chen, Jinwei Liu, Xinshi Zang, Martin D. F. Wong
Starfish: An Efficient P&R Co-Optimization Engine with A*-based Partial Rerouting. ICCAD (2021)
Tsung-Wei Huang, Guannan Guo, Chun-Xun Lin, Martin D. F. Wong
OpenTimer v2: A New Parallel Incremental Timing Analysis Engine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (4) (2021)
Dan Zheng, Xinshi Zang, Martin D. F. Wong
TopoPart: a Multi-level Topology-Driven Partitioning Framework for Multi-FPGA Systems. ICCAD (2021)
Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong
OpenTimer v2: A Parallel Incremental Timing Analysis Engine. IEEE Des. Test 38 (2) (2021)
Binwu Zhu, Ran Chen, Xinyun Zhang, Fan Yang, Xuan Zeng, Bei Yu, Martin D. F. Wong
Hotspot Detection via Multi-task Learning and Transformer Encoder. ICCAD (2021)
Chun-Xun Lin, Tsung-Wei Huang, Martin D. F. Wong
An Efficient Work-Stealing Scheduler for Task Dependency Graph. ICPADS (2020)
Guannan Guo, Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong
An Efficient Critical Path Generation Algorithm Considering Extensive Path Constraints. DAC (2020)
Zhuolun He, Yuzhe Ma, Lu Zhang, Peiyu Liao, Ngai Wong, Bei Yu, Martin D. F. Wong
Learn to Floorplan through Acquisition of Effective Local Search Heuristics. ICCD (2020)
Daifeng Guo, Hongbo Zhang, Martin D. F. Wong
On Coloring Rectangular and Diagonal Grid Graphs for Multipatterning and DSA Lithography. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (6) (2020)
Tsung-Wei Huang, Chun-Xun Lin, Guannan Guo, Martin D. F. Wong
Cpp-Taskflow: Fast Task-Based Parallel Programming Using Modern C++. IPDPS (2019)
Chun-Xun Lin, Tsung-Wei Huang, Guannan Guo, Martin D. F. Wong
An Efficient and Composable Parallel Task Programming Library. HPEC (2019)
Chun-Xun Lin, Tsung-Wei Huang, Guannan Guo, Martin D. F. Wong
A Modern C++ Parallel Task Programming Library. ACM Multimedia (2019)
Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong
Distributed Timing Analysis at Scale. DAC (2019)
Tsung-Wei Huang, Chun-Xun Lin, Guannan Guo, Martin D. F. Wong
Essential Building Blocks for Creating an Open-source EDA Project. DAC (2019)
Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong
DtCraft: A High-Performance Distributed Execution Engine at Scale. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (6) (2019)
Tsung-Wei Huang, Chun-Xun Lin, Guannan Guo, Martin D. F. Wong
A General-purpose Distributed Programming System using Data-parallel Streams. ACM Multimedia (2018)
Chun-Xun Lin, Tsung-Wei Huang, Ting Yu, Martin D. F. Wong
A Distributed Power Grid Analysis Framework from Sequential Stream Graph. ACM Great Lakes Symposium on VLSI (2018)
Chun-Xun Lin, Tsung-Wei Huang, Martin D. F. Wong
Routing at compile time. ISQED (2018)
Tin-Yin Lai, Martin D. F. Wong
A highly compressed timing macro-modeling algorithm for hierarchical and incremental timing analysis. ASP-DAC (2018)
Chun-Xun Lin, Martin D. F. Wong
Accelerate analytical placement with GPU: A generic approach. DATE (2018)
Chun-Xun Lin, Tsung-Wei Huang, Guannan Guo, Martin D. F. Wong
MtDetector: A High-performance Marine Traffic Detector at Stream Scale. DEBS (2018)
Daifeng Guo, Hongbo Zhang, Martin D. F. Wong
On coloring rectangular and diagonal grid graphs for multiple patterning lithography. ASP-DAC (2018)
Leslie Hwang, Beomjin Kwon, Martin D. F. Wong
Accurate Models for Optimizing Tapered Microchannel Heat Sinks in 3D ICs. ISVLSI (2018)
Tsung-Wei Huang, Chun-Xun Lin, Martin D. F. Wong
DtCraft: A distributed execution engine for compute-intensive applications. ICCAD (2017)
Tin-Yin Lai, Tsung-Wei Huang, Martin D. F. Wong
LibAbs: An Efficient and Accurate Timing Macro-Modeling Algorithm for Large Hierarchical Designs. DAC (2017)
S. T. Choden Konigsmark, Deming Chen, Martin D. F. Wong
High-Level Synthesis for side-channel defense. ASAP (2017)
Sven Tenzing Choden Konigsmark, Deming Chen, Martin D. F. Wong
PolyPUF: Physically Secure Self-Divergence. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (7) (2016)
S. T. Choden Konigsmark, Deming Chen, Martin D. F. Wong
Information dispersion for trojan defense through high-level synthesis. DAC (2016)
Haitong Tian, Martin D. F. Wong
Performance evaluation considering mask misalignment in multiple patterning decomposition. ISQED (2016)
Martin D. F. Wong
Early Days of Automatic Floorplan Design. ISPD (2016)
Tsung-Wei Huang, Martin D. F. Wong
UI-Timer 1.0: An Ultrafast Path-Based Timing Analysis Algorithm for CPPR. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (11) (2016)
Tsung-Wei Huang, Martin D. F. Wong, Debjit Sinha, Kerim Kalafala, Natesan Venkateswaran
A distributed timing analysis framework for large designs. DAC (2016)
Zigang Xiao, Chun-Xun Lin, Martin D. F. Wong, Hongbo Zhang
Contact layer decomposition to enable DSA with multi-patterning technique for standard cell based layout. ASP-DAC (2016)
Tsung-Wei Huang, Martin D. F. Wong
Accelerated Path-Based Timing Analysis with MapReduce. ISPD (2015)
Daifeng Guo, Yuelin Du, Martin D. F. Wong
Polynomial time optimal algorithm for stencil row planning in e-beam lithography. ASP-DAC (2015)
Martin D. F. Wong
Early Days of Circuit Placement. ISPD (2015)
Zigang Xiao, Yuelin Du, Martin D. F. Wong, He Yi, H.-S. Philip Wong, Hongbo Zhang
Contact pitch and location prediction for Directed Self-Assembly template verification. ASP-DAC (2015)
Tsung-Wei Huang, Martin D. F. Wong
OpenTimer: A High-Performance Timing Analysis Tool. ICCAD (2015)
Tsung-Wei Huang, Martin D. F. Wong
On fast timing closure: speeding up incremental path-based timing analysis with mapreduce. SLIP (2015)
Haitong Tian, Hongbo Zhang, Zigang Xiao, Martin D. F. Wong
An efficient linear time triple patterning solver. ASP-DAC (2015)
Fan Zhang, Chen Hu, Pei-Ci Wu, Hongbo Zhang, Martin D. F. Wong
Accelerating aerial image simulation using improved CPU/GPU collaborative computing. Comput. Electr. Eng. 46 (2015)
Zigang Xiao, Daifeng Guo, Martin D. F. Wong, He Yi, Maryann C. Tung, H.-S. Philip Wong
Layout optimization and template pattern verification for directed self-assembly (DSA). DAC (2015)
Tsung-Wei Huang, Pei-Ci Wu, Martin D. F. Wong
UI-timer: an ultra-fast clock network pessimism removal algorithm. ICCAD (2014)
Yuelin Du, Martin D. F. Wong
Optimization of standard cell based detailed placement for 16 nm FinFET process. DATE (2014)
Ting Yu, Martin D. F. Wong
Efficient simulation-based optimization of power grid with on-chip voltage regulator. ASP-DAC (2014)
Haitong Tian, Yuelin Du, Hongbo Zhang, Zigang Xiao, Martin D. F. Wong
Triple patterning aware detailed placement with constrained pattern assignment. ICCAD (2014)
Zigang Xiao, Yuelin Du, Haitong Tian, Martin D. F. Wong, He Yi, H.-S. Philip Wong, Hongbo Zhang
Directed Self-Assembly (DSA) Template Pattern Verification. DAC (2014)
Pei-Ci Wu, Martin D. F. Wong, Ivailo Nedelchev, Sarvesh Bhardwaj, Vidyamani Parkhe
On Timing Closure: Buffer Insertion for Hold-Violation Removal. DAC (2014)
S. T. Choden Konigsmark, Leslie Hwang, Deming Chen, Martin D. F. Wong
CNPUF: A Carbon Nanotube-based Physically Unclonable Function for secure low-energy hardware design. ASP-DAC (2014)
Tsung-Wei Huang, Pei-Ci Wu, Martin D. F. Wong
UI-route: An ultra-fast incremental maze routing algorithm. SLIP (2014)
Tsung-Wei Huang, Pei-Ci Wu, Martin D. F. Wong
Fast path-based timing analysis for CPPR. ICCAD (2014)
S. T. Choden Konigsmark, Leslie K. Hwang, Deming Chen, Martin D. F. Wong
System-of-PUFs: Multilevel security for embedded systems. CODES+ISSS (2014)

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Publication Activity (10 Years)

Top Topics

Top Venues

Martin D. F. Wong