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${\rm SPICE}^2$: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA.
Nachiket Kapre
André DeHon
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2012)
Keyphrases
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concurrent execution
parallel execution
high speed
power reduction
parallel processing
parallel algorithm
real time
gate array
spatial data
concurrency control
field programmable gate array
parallel architecture
business intelligence
low power
cost model