Francisco E. Rangel-Patino

Publication Activity (10 Years)

Years Active: 2018-2020
Publications (10 Years): 6

Top Topics

Industrial Applications

Gallium Arsenide

Direct Optimization

Top Venues

IEEE Trans. Emerg. Top. Comput.

Publications

José Ernesto Rayas-Sánchez, Francisco E. Rangel-Patino, Benjamin Mercado-Casillas, Felipe de Jesus Leal-Romo, José Luis Chávez-Hurtado
Machine Learning Techniques and Space Mapping Approaches to Enhance Signal and Power Integrity in High-Speed Links and Power Delivery Networks. LASCAS (2020)
Francisco E. Rangel-Patino, Andres Viveros-Wacher, José Ernesto Rayas-Sánchez, Ismael Duron-Rosales, Edgar-Andrei Vega-Ochoa, Nagib Hakim, Enrique Lopez-Miralrio
A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation. IEEE Trans. Emerg. Top. Comput. 8 (2) (2020)
Francisco E. Rangel-Patino, José Ernesto Rayas-Sánchez, Andres Viveros-Wacher, José Luis Chavez-Hurtado, Edgar-Andrei Vega-Ochoa, Nagib Hakim
Post-Silicon Receiver Equalization Metamodeling by Artificial Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (4) (2019)
Francisco E. Rangel-Patino, José Ernesto Rayas-Sánchez, Nagib Hakim
Transmitter and Receiver Equalizers Optimization Methodologies for High-Speed Links in Industrial Computer Platforms Post-Silicon Validation. ITC (2018)
Francisco E. Rangel-Patino, José Ernesto Rayas-Sánchez, Edgar-Andrei Vega-Ochoa, Nagib Hakim
Direct optimization of a PCI express link equalization in industrial post-silicon validation. LATS (2018)
Andres Viveros-Wacher, Ricardo Baca-Baylon, Francisco E. Rangel-Patino, Miguel A. Davalos-Santana, Edgar-Andrei Vega-Ochoa, José Ernesto Rayas-Sánchez
Jitter tolerance acceleration using the golden section optimization technique. LASCAS (2018)