Noel Menezes

Publication Activity (10 Years)

Years Active: 1993-2019
Publications (10 Years): 1

Top Topics

Implementation Details

Multi Agent Systems

Top Venues

Publications

Noel Menezes
Session details: Keynote. ISPD (2019)
Noel Menezes, Chandramouli V. Kashyap, Chirayu S. Amin
A "true" electrical cell model for timing, noise, and power grid verification. DAC (2008)
Farid N. Najm, Noel Menezes, Imad A. Ferzli
A Yield Model for Integrated Circuits and its Application to Statistical Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (3) (2007)
Chandramouli V. Kashyap, Chirayu S. Amin, Noel Menezes, Eli Chiprout
A nonlinear cell macromodel for digital applications. ICCAD (2007)
Steven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James W. Tschanz, Vivek De
Comparative Analysis of Conventional and Statistical Design Techniques. DAC (2007)
Noel Menezes
The good, the bad, and the statistical. ISPD (2007)
Chirayu S. Amin, Chandramouli V. Kashyap, Noel Menezes, Kip Killpack, Eli Chiprout
A multi-port current source model for multiple-input switching effects in CMOS library cells. DAC (2006)
Chirayu S. Amin, Noel Menezes, Kip Killpack, Florentin Dartu, Umakanta Choudhury, Nagib Hakim, Yehea I. Ismail
Statistical static timing analysis: how simple can we get? DAC (2005)
Florentin Dartu, Anirudh Devgan, Noel Menezes
Variability modeling and variability-aware design in deep submicron integrated circuits. ACM Great Lakes Symposium on VLSI (2005)
Prashant Saxena, Noel Menezes, Pasquale Cocchini, Desmond Kirkpatrick
Repeater scaling and its impact on CAD. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (4) (2004)
Farid N. Najm, Noel Menezes
Statistical timing analysis based on a timing yield model. DAC (2004)
Prashant Saxena, Noel Menezes, Pasquale Cocchini, Desmond Kirkpatrick
The scaling challenge: can correct-by-construction design help? ISPD (2003)
Noel Menezes, Sachin S. Sapatnekar
Optimization and Analysis Techniques for the Deep Submicron Regime. VLSI Design (2001)
Noel Menezes, Chung-Ping Chen
Spec-Based Repeater Insertion and Wire Sizing for On-chip Interconnect. VLSI Design (1999)
Chung-Ping Chen, Noel Menezes
Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching. DAC (1999)
Satyamurthy Pullela, Noel Menezes, Lawrence T. Pileggi
Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (2) (1997)
Noel Menezes, Ross Baldick, Lawrence T. Pileggi
A sequential quadratic programming approach to concurrent gate and wire sizing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (8) (1997)
Ashih D. Mehta, Yao-Ping Chen, Noel Menezes, D. F. Wong, Lawrence T. Pileggi
Clustering and Load Balancing for Buffered Clock Tree Synthesis. ICCD (1997)
Satyamurthy Pullela, Noel Menezes, Lawrence T. Pileggi
Post-processing of clock trees via wiresizing and buffering for robust design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (6) (1996)
Florentin Dartu, Noel Menezes, Lawrence T. Pileggi
Performance computation for precharacterized CMOS gates with RC loads. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (5) (1996)
Noel Menezes, Satyamurthy Pullela, Lawrence T. Pileggi
Simultaneous Gate and Interconnect Sizing for Circuit-Level Delay Optimization. DAC (1995)
Noel Menezes, Ross Baldick, Lawrence T. Pileggi
A sequential quadratic programming approach to concurrent gate and wire sizing. ICCAD (1995)
Ronn B. Brashear, Noel Menezes, Chanhee Oh, Lawrence T. Pillage, M. Ray Mercer
Predicting Circuit Performance Using Circuit-level Statistical Timing Analysis. EDAC-ETC-EUROASIC (1994)
Noel Menezes, Satyamurthy Pullela, Florentin Dartu, Lawrence T. Pillage
RC interconnect synthesis-a moment fitting approach. ICCAD (1994)
Florentin Dartu, Noel Menezes, Jessica Qian, Lawrence T. Pillage
A Gate-Delay Model for high-Speed CMOS Circuits. DAC (1994)
Satyamurthy Pullela, Noel Menezes, Lawrence T. Pillage
Reliable Non-Zero Skew Clock Trees Using Wire Width Optimization. DAC (1993)