Anirudh Devgan

Publication Activity (10 Years)

Years Active: 1993-2009
Publications (10 Years): 0

Publications

Anirudh Devgan, Bulent Basaran, David Colleran, Mar Hershenson
Accelerated design of analog, mixed-signal circuits in Titan. ISPD (2009)
Sachin S. Sapatnekar, Eshel Haritan, Kurt Keutzer, Anirudh Devgan, Desmond Kirkpatrick, Stephen Meier, Duaine Pryor, Tom Spyrou
Reinventing EDA with manycore processors. DAC (2008)
Murari Mani, Anirudh Devgan, Michael Orshansky, Yaping Zhan
A Statistical Algorithm for Power- and Timing-Limited Parametric Yield Optimization of Large Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (10) (2007)
Anand Ramalingam, Anirudh Devgan, David Z. Pan
Wakeup Scheduling in MTCMOS Circuits Using Successive Relaxation to Minimize Ground Bounce. J. Low Power Electron. 3 (1) (2007)
Anand Ramalingam, Sreekumar V. Kodakara, Anirudh Devgan, David Z. Pan
Robust analytical gate delay modeling for low voltage circuits. ASP-DAC (2006)
Rajeev R. Rao, Anirudh Devgan, David T. Blaauw, Dennis Sylvester
Analytical yield prediction considering leakage/performance correlation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (9) (2006)
Rahul M. Rao, Kanak Agarwal, Anirudh Devgan, Kevin J. Nowka, Dennis Sylvester, Richard B. Brown
Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization. ISQED (2005)
Anand Ramalingam, Bin Zhang, Anirudh Devgan, David Z. Pan
Sleep transistor sizing using timing criticality and temporal currents. ASP-DAC (2005)
Rajeev R. Rao, David T. Blaauw, Dennis Sylvester, Anirudh Devgan
Modeling and Analysis of Parametric Yield under Power and Performance Constraints. IEEE Des. Test Comput. 22 (4) (2005)
Michael W. Beattie, Hui Zheng, Anirudh Devgan, Byron Krauter
Spatially distributed 3D circuit models. DAC (2005)
Kanak Agarwal, Dennis Sylvester, David T. Blaauw, Anirudh Devgan
process. ASP-DAC (2005)
Anirudh Devgan, Luca Daniel, Byron Krauter, Lei He
Modeling and Design of Chip-Package Interface. ISQED (2005)
Murari Mani, Anirudh Devgan, Michael Orshansky
An efficient algorithm for statistical minimization of total power under timing yield constraints. DAC (2005)
Emrah Acar, Anirudh Devgan, Sani R. Nassif
Leakage and Leakage Sensitivity Computation for Combinational Circuits. J. Low Power Electron. 1 (2) (2005)
Maha Nizam, Farid N. Najm, Anirudh Devgan
Power grid voltage integrity verification. ISLPED (2005)
Florentin Dartu, Anirudh Devgan, Noel Menezes
Variability modeling and variability-aware design in deep submicron integrated circuits. ACM Great Lakes Symposium on VLSI (2005)
Anirudh Devgan, Sani R. Nassif
Power Variability and Its Impact on Design. VLSI Design (2005)
Anirudh Devgan, Ruchir Puri, Sachin Sapatnaker, Tanay Karnik, Rajiv V. Joshi
Design of sub-90nm Circuits and Design Methodologies. ISQED (2005)
David T. Blaauw, Anirudh Devgan, Farid N. Najm
Leakage power: trends, analysis and avoidance. ASP-DAC (2005)
Charles J. Alpert, Frank Liu, Chandramouli V. Kashyap, Anirudh Devgan
Closed-form delay and slew metrics made easy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (12) (2004)
Rajeev R. Rao, Anirudh Devgan, David T. Blaauw, Dennis Sylvester
Parametric yield estimation considering leakage variability. DAC (2004)
Chandramouli V. Kashyap, Charles J. Alpert, Frank Liu, Anirudh Devgan
Closed-form expressions for extending step delay and slew metrics to ramp inputs for RC trees. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (4) (2004)
Rajiv V. Joshi, Saibal Mukhopadhyay, Donald W. Plass, Yuen H. Chan, Ching-Te Chuang, Anirudh Devgan
Variability analysis for sub-100 nm PD/SOI CMOS SRAM cell. ESSCIRC (2004)
Anirudh Devgan, Chandramouli V. Kashyap
Block-based Static Timing Analysis with Uncertainty. ICCAD (2003)
Rahul M. Rao, Jeffrey L. Burns, Anirudh Devgan, Richard B. Brown
Efficient techniques for gate leakage estimation. ISLPED (2003)
Charles J. Alpert, Frank Liu, Chandramouli V. Kashyap, Anirudh Devgan
Delay and slew metrics using the lognormal distribution. DAC (2003)
Emrah Acar, Anirudh Devgan, Rahul M. Rao, Ying Liu, Haihua Su, Sani R. Nassif, Jeffrey L. Burns
Leakage and leakage sensitivity computation for combinational circuits. ISLPED (2003)
Chandramouli V. Kashyap, Charles J. Alpert, Frank Liu, Anirudh Devgan
Closed form expressions for extending step delay and slew metrics to ramp inputs. ISPD (2003)
Jiayong Le, Lawrence T. Pileggi, Anirudh Devgan
Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics. ICCAD (2003)
Haihua Su, Frank Liu, Anirudh Devgan, Emrah Acar, Sani R. Nassif
Full chip leakage estimation considering power supply and temperature variations. ISLPED (2003)
Charles J. Alpert, Anirudh Devgan, John P. Fishburn, Stephen T. Quay
Correction to "interconnect synthesis without wire tapering". IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (4) (2002)
Chandramouli V. Kashyap, Charles J. Alpert, Frank Liu, Anirudh Devgan
PERI: a technique for extending delay and slew metrics to ramp inputs. Timing Issues in the Specification and Synthesis of Digital Systems (2002)
Charles J. Alpert, Anirudh Devgan, John P. Fishburn, Stephen T. Quay
Interconnect synthesis without wire tapering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (1) (2001)
Hao Ji, Anirudh Devgan, Wayne Wei-Ming Dai
KSim: a stable and efficient RKC simulator for capturing on-chip inductance effect. ASP-DAC (2001)
Charles J. Alpert, Anirudh Devgan, Chandramouli V. Kashyap
RC delay metrics for performance optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (5) (2001)
Chandramouli V. Kashyap, Charles J. Alpert, Anirudh Devgan
An "Effective" Capacitance Based Delay Metric for RC Interconnect. ICCAD (2000)
Anirudh Devgan, Hao Ji, Wayne Wei-Ming Dai
How to Efficiently Capture On-Chip Inductance Effects: Introducing a New Circuit Element K. ICCAD (2000)
Tuyen V. Nguyen, Anirudh Devgan, Ognen J. Nastov, David W. Winston
Transient sensitivity computation in controlled explicit piecewiselinear simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (1) (2000)
Charles J. Alpert, Anirudh Devgan, Chandramouli V. Kashyap
A two moment RC delay metric for performance optimization. ISPD (2000)
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay
Buffer insertion for noise and delay optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18 (11) (1999)
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay
Is wire tapering worthwhile? ICCAD (1999)
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay
Buffer Insertion with Accurate Gate and Interconnect Delay Computation. DAC (1999)
Anirudh Devgan, Peter R. O'Brien
Realizable reduction for RC interconnect circuits. ICCAD (1999)
Tuyen V. Nguyen, Anirudh Devgan, Ali Sadigh
Simulation of coupling capacitances using matrix partitioning. ICCAD (1998)
Tuyen V. Nguyen, Anirudh Devgan, Ognen J. Nastov
Adjoint Transient Sensitivity Computation in Piecewise Linear Simulation. DAC (1998)
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay
Buffer Insertion for Noise and Delay Optimization. DAC (1998)
Anirudh Devgan, Sandip Kundu
Timing Analysis and Optimization: From Devices to Systems (Abstract of Embedded Tutorial). ASP-DAC (1998)
Anirudh Devgan, Leon Stok, Sandip Kundu
Timing analysis and optimization: from devices to systems (tutorial). ICCAD (1997)
Tuyen V. Nguyen, Anirudh Devgan
State transformation in event driven explicit simulation. ICCAD (1997)
Charles J. Alpert, Anirudh Devgan
Wire Segmenting for Improved Buffer Insertion. DAC (1997)
Anirudh Devgan
Efficient coupled noise estimation for on-chip interconnects. ICCAD (1997)
Anirudh Devgan
Transient simulation of integrated circuits in the charge-voltage plane. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (11) (1996)
Anirudh Devgan
Efficient and accurate transient simulation in charge-voltage plane. ICCAD (1995)
Anirudh Devgan, Ronald A. Rohrer
Efficient simulation of interconnect and mixed analog-digital circuits in ACES. VLSI Design (1995)
Anirudh Devgan
Accurate device modeling techniques for efficient timing simulation of integrated circuits. ICCD (1995)
Anirudh Devgan, Ronald A. Rohrer
Adaptively controlled explicit simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13 (6) (1994)
Anirudh Devgan, Ronald A. Rohrer
Event driven adaptively controlled explicit simulation of integrated circuits. ICCAD (1993)
Anirudh Devgan, Ronald A. Rohrer
ACES: A Transient Simulation Strategy for Integrated Circuits. ICCD (1993)