Kevin J. Nowka

Publication Activity (10 Years)

Years Active: 1995-2024
Publications (10 Years): 3

Top Topics

Top Venues

Publications

Sambandh Bhusan Dhal, Stavros Kalafatis, Ulisses Braga-Neto, Krishna Chaitanya Gadepally, Jose Luis Landivar-Scott, Lei Zhao, Kevin J. Nowka, Juan Landivar, Pankaj Pal, Mahendra Bhandari
Testing the Performance of LSTM and ARIMA Models for In-Season Forecasting of Canopy Cover (CC) in Cotton Crops. Remote. Sens. 16 (11) (2024)
Krishna Chaitanya Gadepally, Sambandh Bhusan Dhal, Mahendra Bhandari, Juan Landivar, Stavros Kalafatis, Kevin J. Nowka
A Deep Transfer Learning based approach for forecasting spatio-temporal features to maximize yield in cotton crops. CISS (2023)
Krishna Chaitanya Gadepally, Sambandh Bhusan Dhal, Stavros Kalafatis, Kevin J. Nowka
Realistic Predictors for Regression and Semantic Segmentation. SERA (2023)
Fadi H. Gebara, H. Peter Hofstee, Kevin J. Nowka
Second-Generation Big Data Systems. Computer 48 (1) (2015)
Kevin J. Nowka
Transforming memory systems: Optimizing for client value on emerging workloads. VLSI-DAT (2012)
Jente B. Kuang, Jeremy D. Schaub, Fadi H. Gebara, Dieter F. Wendel, Thomas Fröhnel, Sudesh Saroop, Sani R. Nassif, Kevin J. Nowka
The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2011)
Kevin J. Nowka
Technology variability and uncertainty implications for power- efficient VLSI systems. ISLPED (2010)
Jente B. Kuang, Jeremy D. Schaub, Fadi H. Gebara, Dieter F. Wendel, Sudesh Saroop, Tuyet Nguyen, Thomas Fröhnel, Antje Müller, Christopher M. Durham, Rolf Sautter, Bryan Lloyd, Bryan J. Robbins, Juergen Pille, Sani R. Nassif, Kevin J. Nowka
A 32nm 0.5V-supply dual-read 6T SRAM. CICC (2010)
Sani R. Nassif, Kevin J. Nowka
Physical design challenges beyond the 22nm node. ISPD (2010)
Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham
On-Chip Delay Measurement Based Response Analysis for Timing Characterization. J. Electron. Test. 26 (6) (2010)
Rouwaida Kanj, Rajiv V. Joshi, Jente B. Kuang, J. Kim, Mesut Meterelliyoz, William R. Reohr, Sani R. Nassif, Kevin J. Nowka
Statistical yield analysis of silicon-on-insulator embedded DRAM. ISQED (2009)
Victoria Wang, Kanak Agarwal, Sani R. Nassif, Kevin J. Nowka, Dejan Markovic
A Design Model for Random Process Variability. ISQED (2008)
Ramyanshu Datta, Jacob A. Abraham, Abdulkadir Utku Diril, Abhijit Chatterjee, Kevin J. Nowka
Performance-Optimized Design for Parametric Reliability. J. Electron. Test. 24 (1-3) (2008)
Jente B. Kuang, Keunwoo Kim, Ching-Te Chuang, Hung C. Ngo, Fadi H. Gebara, Kevin J. Nowka
Circuit Techniques Utilizing Independent Gate Control in Double-Gate Technologies. IEEE Trans. Very Large Scale Integr. Syst. 16 (12) (2008)
Kevin J. Nowka, Sani R. Nassif, Kanak Agarwal
Characterization and design for variability and reliability. CICC (2008)
Jente B. Kuang, Abraham Mathews, John Barth, Fadi H. Gebara, Tuyet Nguyen, Jeremy D. Schaub, Kevin J. Nowka, Gary D. Carpenter, Don Plass, Erik Nelson, Ivan Vo, William R. Reohr, Toshiaki Kirihata
An on-chip dual supply charge pump system for 45nm PD SOI eDRAM. ESSCIRC (2008)
Fadi H. Gebara, Jeremy D. Schaub, Tuyet Nguyen, Jarom Peña, Ivan Vo, David Boerstler, Kevin J. Nowka
A 1V 18GHz Clock Generator in a 65nm PD-SOI Technology. ISSCC (2007)
Kanak Agarwal, Kevin J. Nowka
Dynamic Power Management by Combination of Dual Static Supply Voltages. ISQED (2007)
Harmander Singh, Kanak Agarwal, Dennis Sylvester, Kevin J. Nowka
Enhanced Leakage Reduction Techniques Using Intermediate Strength Power Gating. IEEE Trans. Very Large Scale Integr. Syst. 15 (11) (2007)
Wei Zhao, Yu Cao, Frank Liu, Kanak Agarwal, Dhruva Acharyya, Sani R. Nassif, Kevin J. Nowka
Rigorous extraction of process variations for 65nm CMOS design. ESSCIRC (2007)
Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown
Gate-Induced Barrier Field Effect Transistor (GBFET) - A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems. VLSI Design (2006)
Harmander Deogun, Robert M. Senger, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka
boosted pulsed bus technique for low power and low leakage operation. ISLPED (2006)
Praveen Elakkumanan, Jente B. Kuang, Kevin J. Nowka, Ramalingam Sridhar, Rouwaida Kanj, Sani R. Nassif
SRAM Local Bit Line Access Failure Analyses. ISQED (2006)
Ramyanshu Datta, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham
A Scheme for On-Chip Timing Characterization. VTS (2006)
Harmander Deogun, Dennis Sylvester, Kevin J. Nowka
Fine grained multi-threshold CMOS for enhanced leakage reduction. ISCAS (2006)
Kanak Agarwal, Kevin J. Nowka, Harmander Deogun, Dennis Sylvester
Power Gating with Multiple Sleep Modes. ISQED (2006)
Ramyanshu Datta, Jacob A. Abraham, Abdulkadir Utku Diril, Abhijit Chatterjee, Kevin J. Nowka
Adaptive Design for Performance-Optimized Robustness. DFT (2006)
Xiao Yan Yu, Robert K. Montoye, Kevin J. Nowka, Bart R. Zeydel, Vojin G. Oklobdzija
Circuit Design Style for Energy Efficiency: LSDL and Compound Domino. PATMOS (2006)
Rahul M. Rao, Kanak Agarwal, Anirudh Devgan, Kevin J. Nowka, Dennis Sylvester, Richard B. Brown
Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization. ISQED (2005)
Harmander Singh Deogun, Dennis Sylvester, Rahul M. Rao, Kevin J. Nowka
Adaptive MTCMOS for dynamic leakage and frequency control using variable footer strength. SoCC (2005)
Sachin S. Sapatnekar, Kevin J. Nowka
Guest Editors' Introduction: New Dimensions in 3D Integration. IEEE Des. Test Comput. 22 (6) (2005)
Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown
Controlled-Load Limited Switch Dynamic Logic Circuit. ISQED (2005)
Jente B. Kuang, Hung C. Ngo, Kevin J. Nowka, Jethro C. Law, Rajiv V. Joshi
A Low-Overhead Virtual Rail Technique for SRAM Leakage Power Reduction. ICCD (2005)
Harmander Deogun, Rahul M. Rao, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka
Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Crosstalk Minimization. ISQED (2005)
Alan J. Drake, Kevin J. Nowka, Tuyet Nguyen, Jeffrey L. Burns, Richard B. Brown
Resonant clocking using distributed parasitic capacitance. IEEE J. Solid State Circuits 39 (9) (2004)
Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka, Sani R. Nassif
Approaches to run-time and standby mode leakage reduction in global buses. ISLPED (2004)
Juan Antonio Carballo, Kevin J. Nowka, Seung-Moon Yoo, Ivan Vo, Clay Cranford, V. Robert Norman
Requirement-based design methods for adaptive communications links. DAC (2004)
Ramyanshu Datta, Jacob A. Abraham, Robert K. Montoye, Wendy Belluomini, Hung C. Ngo, Chandler McDowell, Jente B. Kuang, Kevin J. Nowka
A low latency and low power dynamic Carry Save Adder. ISCAS (2) (2004)
Kevin J. Nowka, Gary D. Carpenter, Bishop Brock
The design and application of the PowerPC 405LP energy-efficient system-on-a-chip. IBM J. Res. Dev. 47 (5-6) (2003)
Alan J. Drake, Kevin J. Nowka, Richard B. Brown
Evaluation of Dynamic-Threshold Logic for Low-Power VLSI Design in 0.13um PD-SOI. VLSI-SOC (2003)
Alan J. Drake, Kevin J. Nowka, Tuyet Nguyen, Jeffrey L. Bums, Richard B. Brown
Resonant clocking using distributed parasitic capacitance. CICC (2003)
Kevin J. Nowka, Gary D. Carpenter, Eric W. MacDonald, Hung C. Ngo, Bishop Brock, Koji I. Ishii, Tuyet Nguyen, Jeffrey L. Burns
A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling. IEEE J. Solid State Circuits 37 (11) (2002)
Ohsang Kwon, Kevin J. Nowka, Earl E. Swartzlander Jr.
A 16-Bit by 16-Bit MAC Design Using Fast 5: 3 Compressor Cells. J. VLSI Signal Process. 31 (2) (2002)
Ohsang Kwon, Earl E. Swartzlander Jr., Kevin J. Nowka
A fast hybrid carry-lookahead/carry-select adder design. ACM Great Lakes Symposium on VLSI (2001)
Hoang Q. Dao, Kevin J. Nowka, Vojin G. Oklobdzija
Analysis of clocked timing elements for dynamic voltage scaling effects over process parameter variation. ISLPED (2001)
Martin S. Schmookler, Kevin J. Nowka
Leading Zero Anticipation and Detection-A Comparison of Methods. IEEE Symposium on Computer Arithmetic (2001)
Ohsang Kwon, Earl E. Swartzlander Jr., Kevin J. Nowka
A 16-Bit x 16-Bit MAC Design Using Fast 5: 2 Compressors. ASAP (2000)
Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Paula K. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, Nobuo Kojima, Ohsang Kwon, Kyung T. Lee, David Meltzer, Kevin J. Nowka, J. Park, J. Peter, Joel Silberman, Osamu Takahashi, Paul Villarrubia
"Timing closure by design, " a high frequency microprocessor design methodology. DAC (2000)
David H. Allen, Sang H. Dhong, H. Peter Hofstee, Jens Leenstra, Kevin J. Nowka, Daniel L. Stasiak, Dieter F. Wendel
Custom circuit design as a driver of microprocessor performance. IBM J. Res. Dev. 44 (6) (2000)
H. Peter Hofstee, Kevin J. Nowka
Beyond 1 GHz. CICC (1999)
David F. Heidel, Sang H. Dhong, H. Peter Hofstee, Michael Immediato, Kevin J. Nowka, Joel Silberman, Kevin Stawiasz
High-Speed Serializing/De-Serializing Design-For-Test Method for Evaluating a 1 GHz Microprocessor. VTS (1998)
H. Peter Hofstee, Sang H. Dhong, David Meltzer, Kevin J. Nowka, Joel Silberman, Jeffrey L. Burns, Stephen D. Posluszny, Osamu Takahashi
Designing for a gigahertz [guTS integer processor]. IEEE Micro 18 (3) (1998)
Kevin J. Nowka, Tibi Galambos
Circuit design techniques for a gigahertz integer microprocessor. ICCD (1998)
Joel Silberman, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Axel Essbaum, Uttam Ghoshal, David F. Heidel, H. Peter Hofstee, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Stephen D. Posluszny, Osamu Takahashi, Ivan Vo, Brian A. Zoric
A 1.0-GHz single-issue 64-bit powerPC integer processor. IEEE J. Solid State Circuits 33 (11) (1998)
Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Uttam Ghoshal, H. Peter Hofstee, David P. LaPotin, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Joel Silberman, Osamu Takahashi, Ivan Vo
Design methodology for a 1.0 GHz microprocessor. ICCD (1998)
Kevin J. Nowka, H. Peter Hofstee
Circuits and Microarchitecture for Gigahertz VLSI Designs. ARVLSI (1997)
Michael J. Flynn, Kevin J. Nowka, Gary Bewick, Eric M. Schwarz, Nhon T. Quach
The SNAP Project: Towards Sub-Nanosecond Arithmetic. IEEE Symposium on Computer Arithmetic (1995)
Kevin J. Nowka, Michael J. Flynn
System Design Using Wave-Pipelining: A CMOS VLSI Vector Unit. ISCAS (1995)