Stephen D. Posluszny

Publication Activity (10 Years)

Years Active: 1986-2015
Publications (10 Years): 0

Top Topics

Optimization Methods

Search Algorithm

Energy Efficient

Top Venues

IBM J. Res. Dev.

Publications

Victor V. Zyuban, Joshua Friedrich, Daniel M. Dreps, Jürgen Pille, Donald W. Plass, Phillip J. Restle, Zeynep Toprak Deniz, Matthew M. Ziegler, Sam G. Chu, Md. Saiful Islam, James D. Warnock, Bob Philhower, Rahul M. Rao, Gregory S. Still, David Shan, Eric Fluhr, Jose Paredes, Dieter F. Wendel, Christopher J. Gonzalez, D. Hogenmiller, Ruchir Puri, Scott A. Taylor, Stephen D. Posluszny
IBM POWER8 circuit design and energy optimization. IBM J. Res. Dev. 59 (1) (2015)
Joshua Friedrich, Ruchir Puri, Uwe Brandt, Markus Bühler, Jack DiLullo, Jeremy Hopkins, Mozammel Hossain, Michael A. Kazda, Joachim Keinert, Zahi M. Kurzum, Douglass Lamb, Alice Lee, Frank Musante, Jens Noack, Peter J. Osler, Stephen D. Posluszny, Haifeng Qian, Shyam Ramji, Vasant B. Rao, Lakshmi N. Reddy, Haoxing Ren, Thomas E. Rosser, Benjamin R. Russell, Cliff C. N. Sze, Gustavo E. Téllez
Design methodology for the IBM POWER7 microprocessor. IBM J. Res. Dev. 55 (3) (2011)
Osamu Takahashi, Erwin Behnen, Scott R. Cottier, Paula K. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, C. J. Johnson, Stephen D. Posluszny
Cell Broadband Engine Processor Design Methodology. CICC (2007)
Dac C. Pham, Tony Aipperspach, David Boerstler, Mark Bolliger, Rajat Chaudhry, Dennis Cox, Paul E. Harvey, H. Peter Hofstee, Charles R. Johns, Jim Kahle, Atsushi Kameyama, John M. Keaty, Yoshio Masubuchi, Mydung Pham, Jürgen Pille, Stephen D. Posluszny, Mack W. Riley, Daniel L. Stasiak, Masakazu Suzuoki, Osamu Takahashi, James D. Warnock, Stephen Weitzel, Dieter F. Wendel, Kazuaki Yazawa
Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor. IEEE J. Solid State Circuits 41 (1) (2006)
Dac C. Pham, Hans-Werner Anderson, Erwin Behnen, Mark Bolliger, Sanjay Gupta, H. Peter Hofstee, Paul E. Harvey, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Sang Lee, Tuyen V. Nguyen, John G. Petrovick, Mydung Pham, Juergen Pille, Stephen D. Posluszny, Mack W. Riley, Joseph Verock, James D. Warnock, Steve Weitzel, Dieter F. Wendel
Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor. ASP-DAC (2006)
James D. Warnock, Dieter F. Wendel, Tony Aipperspach, Erwin Behnen, Robert A. Cordes, Sang H. Dhong, Koji Hirairi, Hiroaki Murakami, Shohji Onishi, Dac C. Pham, Jürgen Pille, Stephen D. Posluszny, Osamu Takahashi, Huajun Wen
Circuit Design Techniques for a First-Generation Cell Broadband Engine Processor. IEEE J. Solid State Circuits 41 (8) (2006)
Rajat Chaudhry, Daniel L. Stasiak, Stephen D. Posluszny, Sang H. Dhong
A cycle accurate power estimation tool. ASP-DAC (2006)
Daniel L. Stasiak, Rajat Chaudhry, Dennis Cox, Stephen D. Posluszny, James D. Warnock, Steve Weitzel, Dieter F. Wendel, Michael Wang
Cell Processor Low-Power Design Methodology. IEEE Micro 25 (6) (2005)
Sani R. Nassif, Paul S. Zuchowski, Claude Moughanni, Mohamed Moosa, Stephen D. Posluszny, Ward Vercruysse
The Titanic: what went wrong! DAC (2005)
Dac C. Pham, Erwin Behnen, Mark Bolliger, H. Peter Hofstee, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Yoshio Masubuchi, Stephen D. Posluszny, Mack W. Riley, Masakazu Suzuoki, Michael Wang, James D. Warnock, Steve Weitzel, Dieter F. Wendel, Kazuaki Yazawa
The design methodology and implementation of a first-generation CELL processor: a multi-core SoC. CICC (2005)
Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Paula K. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, Nobuo Kojima, Ohsang Kwon, Kyung T. Lee, David Meltzer, Kevin J. Nowka, J. Park, J. Peter, Joel Silberman, Osamu Takahashi, Paul Villarrubia
"Timing closure by design, " a high frequency microprocessor design methodology. DAC (2000)
H. Peter Hofstee, Sang H. Dhong, David Meltzer, Kevin J. Nowka, Joel Silberman, Jeffrey L. Burns, Stephen D. Posluszny, Osamu Takahashi
Designing for a gigahertz [guTS integer processor]. IEEE Micro 18 (3) (1998)
Joel Silberman, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Axel Essbaum, Uttam Ghoshal, David F. Heidel, H. Peter Hofstee, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Stephen D. Posluszny, Osamu Takahashi, Ivan Vo, Brian A. Zoric
A 1.0-GHz single-issue 64-bit powerPC integer processor. IEEE J. Solid State Circuits 33 (11) (1998)
Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Uttam Ghoshal, H. Peter Hofstee, David P. LaPotin, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Joel Silberman, Osamu Takahashi, Ivan Vo
Design methodology for a 1.0 GHz microprocessor. ICCD (1998)
Stephen D. Posluszny
SLS: An Advanced Symbolic Layout System for Bipolar and FET Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5 (4) (1986)