Sudesh Saroop

Publication Activity (10 Years)

Years Active: 2010-2021
Publications (10 Years): 3

Top Topics

Metal Oxide Semiconductor

Random Access Memory

Vlsi Implementation

Power Consumption

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Sameer H. Jain, Dimitri Lederer, Arvind Kumar, Sudesh Saroop, Chris Prindle, P. Srinivasan, Wen Liu, Ravi Achanta, Erdem Kaltalioglu, Stephen Moss, Greg Freeman, Paul Colestock
Novel mmWave NMOS Device for High Pout mmWave Power Amplifiers in 45RFSOI. ESSDERC (2021)
John Pekarik, Vibhor Jain, Crystal Kenney, Judson Holt, Shweta Khokale, Sudesh Saroop, Jeffrey B. Johnson, Kenneth Stein, Viorel Ontalus, Christopher Durcan, Mona Nafari, Tayel Nesheiwat, Sangameshwar Saudari, Elahe Yarmoghaddam, Saloni Chaurasia, Alvin Joseph
SiGe HBTs with ${f_{T}/f_{\max}\, \sim\, 375/510GHz}$ Integrated in 45nm PDSOI CMOS. BCICTS (2021)
Rajiv V. Joshi, Sudesh Saroop, Rouwaida Kanj, Yang Liu, Weike Wang, Carl Radens, Yue Tan, Karthik Yogendra
A Universal Hardware-Driven PVT and Layout-Aware Predictive Failure Analytics for SRAM. IEEE Trans. Very Large Scale Integr. Syst. 24 (3) (2016)
Rajiv V. Joshi, Keunwoo Kim, Rouwaida Kanj, Ajay N. Bhoj, Matthew M. Ziegler, Phil Oldiges, Pranita Kerber, Robert Wong, Terence Hook, Sudesh Saroop, Carl Radens, Chun-Chen Yeh
Super Fast Physics-Based Methodology for Accurate Memory Yield Prediction. IEEE Trans. Very Large Scale Integr. Syst. 23 (3) (2015)
Jente B. Kuang, Jeremy D. Schaub, Fadi H. Gebara, Dieter F. Wendel, Thomas Fröhnel, Sudesh Saroop, Sani R. Nassif, Kevin J. Nowka
The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2011)
Jente B. Kuang, Jeremy D. Schaub, Fadi H. Gebara, Dieter F. Wendel, Sudesh Saroop, Tuyet Nguyen, Thomas Fröhnel, Antje Müller, Christopher M. Durham, Rolf Sautter, Bryan Lloyd, Bryan J. Robbins, Juergen Pille, Sani R. Nassif, Kevin J. Nowka
A 32nm 0.5V-supply dual-read 6T SRAM. CICC (2010)