Ashwin Raghunathan

Publication Activity (10 Years)

Years Active: 2004-2022
Publications (10 Years): 3

Top Topics

Clock Frequency

Energy Efficient

Data Aggregation

Theoretical Basis

Top Venues

IEEE J. Solid State Circuits

Publications

Sachin Kalia, Salvatore Finocchiaro, Tolga Dinc, Bichoy Bahr, Ashwin Raghunathan, Gerd Schuppener, Siraj Akhtar, Tobias Fritz, Baher Haroun, Benjamin Cook, Swaminathan Sankaran
20 GHz Fractional-N Analog PLL With a BAW Resonator Based On-Chip 2.5 GHz Reference. IEEE J. Solid State Circuits 57 (5) (2022)
Ashwin Raghunathan, Thomas H. Lee
A Simple Linear Time-Variant Theory of Superregeneration. ISCAS (2020)
Ashwin Raghunathan, Thomas H. Lee
A 125 pJ/hit 5 mW 28 GHz Superregenerative Receiver with Automatic Gain Control and Energy Efficient Startup for Burst Mode IoE Applications. ESSCIRC (2018)
Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham
On-Chip Delay Measurement Based Response Analysis for Timing Characterization. J. Electron. Test. 26 (6) (2010)
Ashwin Raghunathan, Ji Hwan (Paul) Chun, Jacob A. Abraham, Abhijit Chatterjee
Quasi-Oscillation Based Test for Improved Prediction of Analog Performance Parameters. ITC (2004)
Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Jacob A. Abraham
On-chip delay measurement for silicon debug. ACM Great Lakes Symposium on VLSI (2004)
Ashwin Raghunathan, Hongjoong Shin, Jacob A. Abraham, Abhijit Chatterjee
Prediction of Analog Performance Parameters Using Oscillation Based Test. VTS (2004)