A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS.
Jason HowardSaurabh DigheYatin HoskoteSriram R. VangalDavid FinanGregory RuhlDavid JenkinsHoward WilsonNitin BorkarGerhard SchromFabric PailetShailendra JainTiju JacobSatish YadaSraven MarellaPraveen SalihundamVasantha ErraguntlaMichael KonowMichael RiepenGuido DroegeJoerg LindemannMatthias GriesThomas ApelKersten HenrissTor Lund-LarsenSebastian SteiblShekhar BorkarVivek DeRob F. Van der WijngaartTimothy G. MattsonPublished in: ISSCC (2010)
Keyphrases
- message passing
- high speed
- belief propagation
- power reduction
- single chip
- power consumption
- distributed systems
- cmos technology
- low power
- distributed shared memory
- shared memory
- approximate inference
- factor graphs
- markov random field
- graphical models
- low cost
- multithreading
- parallel processing
- probabilistic inference
- nm technology
- distributed memory
- random access memory
- sum product
- inference in graphical models
- graph cuts
- parallel architectures
- junction tree
- pairwise
- high quality
- power dissipation
- image sensor
- stereo matching
- metal oxide semiconductor
- probability distribution