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Emre Özer
ORCID
Publication Activity (10 Years)
Years Active: 1998-2022
Publications (10 Years): 4
Top Topics
Write Operations
Bacterial Foraging
Pid Control
Response Surface
Top Venues
MICRO
ISPASS
IEEE Comput. Archit. Lett.
Int. J. Circuit Theory Appl.
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Publications
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Emre Özer
A new electronically tunable mutually coupled circuit using current conveyor transconductance amplifiers (CCTAs).
Int. J. Circuit Theory Appl.
50 (9) (2022)
Emre Özer
,
Firat Kaçar
Current-Mode PID Controller Using Second-Generation Voltage Conveyor (VCII).
J. Circuits Syst. Comput.
31 (17) (2022)
Marios Kleanthous
,
Yiannakis Sazeides
,
Emre Özer
,
Chrysostomos Nicopoulos
,
Panagiota Nikolaou
,
Zacharias Hadjilambrou
Toward Multi-Layer Holistic Evaluation of System Designs.
IEEE Comput. Archit. Lett.
15 (1) (2016)
Yekta Said Can
,
Fatih Alagöz
,
Emre Özer
,
Mucahit Gundebahar
Counterfeit gold identification using sound and image processing.
SIU
(2015)
Panagiota Nikolaou
,
Yiannakis Sazeides
,
Lorena Ndreu
,
Emre Özer
,
Sachin Idgunji
Memory array protection: check on read or check on write?
DATE
(2013)
Damien Hardy
,
Marios Kleanthous
,
Isidoros Sideris
,
Ali G. Saidi
,
Emre Özer
,
Yiannakis Sazeides
An analytical framework for estimating TCO and exploring data center design space.
ISPASS
(2013)
Yiannakis Sazeides
,
Emre Özer
,
Danny Kershaw
,
Panagiota Nikolaou
,
Marios Kleanthous
,
Jaume Abella
Implicit-storing and redundant-encoding-of-attribute information in error-correction-codes.
MICRO
(2013)
Pejman Lotfi-Kamran
,
Boris Grot
,
Michael Ferdman
,
Stavros Volos
,
Yusuf Onur Koçberber
,
Javier Picorel
,
Almutaz Adileh
,
Djordje Jevdjic
,
Sachin Idgunji
,
Emre Özer
,
Babak Falsafi
Scale-out processors.
ISCA
(2012)
Dragomir Milojevic
,
Sachin Idgunji
,
Djordje Jevdjic
,
Emre Özer
,
Pejman Lotfi-Kamran
,
Andreas Panteli
,
Andreas Prodromou
,
Chrysostomos Nicopoulos
,
Damien Hardy
,
Babak Falsafi
,
Yiannakis Sazeides
Thermal characterization of cloud workloads on a power-efficient server-on-chip.
ICCD
(2012)
Bushra Ahsan
,
Lorena Ndreu
,
Isidoros Sideris
,
Yiannakis Sazeides
,
Sachin Idgunji
,
Emre Özer
Eliminating energy of same-content-cell-columns of on-chip SRAM arrays.
ISLPED
(2011)
Massoud Mokhtarpour Ghahroodi
,
Mark Zwolinski
,
Emre Özer
Radiation hardening by design: A novel gate level approach.
AHS
(2011)
Mrinmoy Ghosh
,
Emre Özer
,
Simon Ford
,
Stuart Biles
,
Hsien-Hsin S. Lee
Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches.
ISLPED
(2009)
Emre Özer
,
Ronald G. Dreslinski
,
Trevor N. Mudge
,
Stuart Biles
,
Krisztián Flautner
Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor.
SAMOS
(2008)
Emre Özer
,
Andy Nisbet
,
David Gregg
A stochastic bitwidth estimation technique for compact and low-power custom processors.
ACM Trans. Embed. Comput. Syst.
7 (3) (2008)
Emre Özer
,
Alastair Reid
,
Stuart Biles
Low-cost Techniques for Reducing Branch Context Pollution in a Soft Realtime Embedded Multithreaded Processor.
SBAC-PAD
(2007)
Emre Özer
,
Stuart Biles
Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor.
Asia-Pacific Computer Systems Architecture Conference
(2007)
Yunhe Shi
,
Emre Özer
,
David Gregg
Analyzing Effects of Trace Cache Configurations on the Prediction of Indirect Branches.
J. Instr. Level Parallelism
8 (2006)
Mrinmoy Ghosh
,
Emre Özer
,
Stuart Biles
,
Hsien-Hsin S. Lee
Efficient System-on-Chip Energy Management with a Segmented Bloom Filter.
ARCS
(2006)
Dong Hyuk Woo
,
Mrinmoy Ghosh
,
Emre Özer
,
Stuart Biles
,
Hsien-Hsin S. Lee
Reducing energy of virtual cache synonym lookup using bloom filters.
CASES
(2006)
Yunhe Shi
,
Emre Özer
,
David Gregg
Low-Cost Microarchitectural Techniques for Enhancing the Prediction of Return Addresses on High-Performance Trace Cache Processors.
ISCIS
(2006)
Emre Özer
,
Andy Nisbet
,
David Gregg
,
Owen Callanan
Estimating data bus size for custom processors in embedded systems.
Des. Autom. Embed. Syst.
10 (1) (2005)
Owen Callanan
,
Andy Nisbet
,
Emre Özer
,
James Sexton
,
David Gregg
FPGA Implementation of a Lattice Quantum Chromodynamics Algorithm Using Logarithmic Arithmetic.
IPDPS
(2005)
Emre Özer
,
Thomas M. Conte
High-Performance and Low-Cost Dual-Thread VLIW Processor Using Weld Architecture Paradigm.
IEEE Trans. Parallel Distributed Syst.
16 (12) (2005)
Emre Özer
,
Resit Sendag
,
David Gregg
Multiple-Valued Caches for Power-Efficient Embedded Systems.
ISMVL
(2005)
Emre Özer
,
Andy Nisbet
,
David Gregg
Automatic Customization of Embedded Applications for Enhanced Performance and Reduced Power Using Optimizing Compiler Techniques.
Euro-Par
(2004)
Emre Özer
,
Andy Nisbet
,
David Gregg
Fine-Tuning Loop-Level Parallelism for Increasing Performance of DSP Applications on FPGAs.
FCCM
(2004)
Emre Özer
,
Andy Nisbet
,
David Gregg
Stochastic Bit-Width Approximation Using Extreme Value Theory for Customizable Processors.
CC
(2004)
Emre Özer
,
Thomas M. Conte
,
Saurabh Sharma
Weld: A Multithreading Technique Towards Latency-Tolerant VLIW Processors.
HiPC
(2001)
Emre Özer
,
Sanjeev Banerjia
,
Thomas M. Conte
Unified Assign and Schedule: A New Approach to Scheduling for Clustered Register File Microarchitectures.
MICRO
(1998)
Emre Özer
,
Sumedh W. Sathaye
,
Kishore N. Menezes
,
Sanjeev Banerjia
,
Matthew D. Jennings
,
Thomas M. Conte
A Fast Interrupt Handling Scheme for VLIW Processors.
IEEE PACT
(1998)