Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor.
Emre ÖzerStuart BilesPublished in: Asia-Pacific Computer Systems Architecture Conference (2007)
Keyphrases
- real time
- high speed
- embedded processors
- graphics processing units
- high reliability
- cell processor
- general purpose
- distributed memory
- signal processor
- real time systems
- single chip
- highly parallel
- priority scheduling
- signal processing
- data acquisition
- high efficiency
- computer architecture
- control system
- fpga device
- video sequences
- neural network