Pejman Lotfi-Kamran

Publication Activity (10 Years)

Years Active: 2005-2023
Publications (10 Years): 37

Top Topics

Top Venues

IEEE Comput. Archit. Lett.

IEEE Trans. Computers

Publications

Paria Darbani, Hakem Beitollahi, Pejman Lotfi-Kamran
Rei: A Reconfigurable Interconnection Unit for Array-Based CNN Accelerators. IEEE Trans. Emerg. Top. Comput. 11 (4) (2023)
Saba Mostofi, Hajar Falahati, Negin Mahani, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Snake: A Variable-length Chain-based Prefetching for GPUs. MICRO (2023)
Ali Ansari, Fatemeh Golshan, Rahil Barati, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
MANA: Microarchitecting a Temporal Instruction Prefetcher. IEEE Trans. Computers 72 (3) (2023)
Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Chapter Four - Beyond spatial or temporal prefetching. Adv. Comput. 125 (2022)
Mehran Shakerinava, Fatemeh Golshan, Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Chapter Six - Evaluation of data prefetchers. Adv. Comput. 125 (2022)
Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Chapter Two - Spatial prefetching. Adv. Comput. 125 (2022)
Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Chapter One - Introduction to data prefetching. Adv. Comput. 125 (2022)
Mehran Shakerinava, Fatemeh Golshan, Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Chapter Five - State-of-the-art data prefetchers. Adv. Comput. 125 (2022)
Sina Darabi, Ehsan Yousefzadeh-Asl-Miandoab, Negar Akbarzadeh, Hajar Falahati, Pejman Lotfi-Kamran, Mohammad Sadrosadati, Hamid Sarbazi-Azad
OSM: Off-Chip Shared Memory for GPUs. IEEE Trans. Parallel Distributed Syst. 33 (12) (2022)
Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Chapter Three - Temporal prefetching. Adv. Comput. 125 (2022)
Paria Darbani, Nezam Rohbani, Hakem Beitollahi, Pejman Lotfi-Kamran
RASHT: A Partially Reconfigurable Architecture for Efficient Implementation of CNNs. IEEE Trans. Very Large Scale Integr. Syst. 30 (7) (2022)
Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Preface. Adv. Comput. 125 (2022)
Hajar Falahati, Masoud Peyro, Hossein Amini, Mehran Taghian, Mohammad Sadrosadati, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Data-Aware Compression of Neural Networks. IEEE Comput. Archit. Lett. 20 (2) (2021)
Ali Ansari, Fatemeh Golshan, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
MANA: Microarchitecting an Instruction Prefetcher. CoRR (2021)
Mohammad Bakhshalipour, Mehran Shakerinava, Fatemeh Golshan, Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
A Survey on Recent Hardware Data Prefetching Approaches with An Emphasis on Servers. CoRR (2020)
Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Divide and Conquer Frontend Bottleneck. ISCA (2020)
Fatemeh Golshan, Mohammad Bakhshalipour, Mehran Shakerinava, Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Harnessing Pairwise-Correlating Data Prefetching With Runahead Metadata. IEEE Comput. Archit. Lett. 19 (2) (2020)
Mohammad Bakhshalipour, Aydin Faraji, Seyed Armin Vakil-Ghahani, Farid Samandi, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Reducing Writebacks Through In-Cache Displacement. ACM Trans. Design Autom. Electr. Syst. 24 (2) (2019)
Mohammad Bakhshalipour, Mehran Shakerinava, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Bingo Spatial Data Prefetcher. HPCA (2019)
Ali Ansari, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Code Layout Optimization for Near-Ideal Instruction Cache. IEEE Comput. Archit. Lett. 18 (2) (2019)
Mohammad Bakhshalipour, Seyedali Tabaeiaghdaei, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Evaluation of Hardware Data Prefetchers on Server Processors. ACM Comput. Surv. 52 (3) (2019)
Armin Vakil-Ghahani, Sara Mahdizadeh-Shahri, Mohammad-Reza Lotfi-Namin, Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Cache Replacement Policy Based on Expected Hit Count. IEEE Comput. Archit. Lett. 17 (1) (2018)
Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Abbas Mazloumi, Farid Samandi, Mahmood Naderan-Tahan, Mehdi Modarressi, Hamid Sarbazi-Azad
Fast Data Delivery for Many-Core Processors. IEEE Trans. Computers 67 (10) (2018)
Hajar Falahati, Pejman Lotfi-Kamran, Mohammad Sadrosadati, Hamid Sarbazi-Azad
ORIGAMI: A Heterogeneous Split Architecture for In-Memory Acceleration of Learning. CoRR (2018)
Amir Yazdanbakhsh, Choungki Song, Jacob Sacks, Pejman Lotfi-Kamran, Hadi Esmaeilzadeh, Nam Sung Kim
In-DRAM near-data approximate acceleration for GPUs. PACT (2018)
Mohammad Bakhshalipour, HamidReza Zare, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Die-Stacked DRAM: Memory, Cache, or MemCache? CoRR (2018)
Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Domino Temporal Data Prefetcher. HPCA (2018)
Seyed Armin Vakil-Ghahani, Sara Mahdizadeh-Shahri, Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Making Belady-Inspired Replacement Policies More Effective Using Expected Hit Count. CoRR (2018)
Pouya Esmaili-Dokht, Mohammad Bakhshalipour, Behnam Khodabandeloo, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Scale-Out Processors & Energy Efficiency. CoRR (2018)
Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
Chapter One - Dark Silicon and the History of Computing. Adv. Comput. 110 (2018)
Amir Yazdanbakhsh, Divya Mahajan, Hadi Esmaeilzadeh, Pejman Lotfi-Kamran
AxBench: A Multiplatform Benchmark Suite for Approximate Computing. IEEE Des. Test 34 (2) (2017)
Pejman Lotfi-Kamran, Mehdi Modarressi, Hamid Sarbazi-Azad
Near-Ideal Networks-on-Chip for Servers. HPCA (2017)
Mohammad Bakhshalipour, Pejman Lotfi-Kamran, Hamid Sarbazi-Azad
An Efficient Temporal Data Prefetcher for L1 Caches. IEEE Comput. Archit. Lett. 16 (2) (2017)
Seyyed Hossein Seyyedaghaei Rezaei, Abbas Mazloumi, Mehdi Modarressi, Pejman Lotfi-Kamran
Dynamic Resource Sharing for High-Performance 3-D Networks-on-Chip. IEEE Comput. Archit. Lett. 15 (1) (2016)
Pejman Lotfi-Kamran, Mehdi Modarressi, Hamid Sarbazi-Azad
An Efficient Hybrid-Switched Network-on-Chip for Chip Multiprocessors. IEEE Trans. Computers 65 (5) (2016)
Pejman Lotfi-Kamran
Per-packet global congestion estimation for fast packet delivery in networks-on-chip. J. Supercomput. 71 (9) (2015)
Amir Yazdanbakhsh, Jongse Park, Hardik Sharma, Pejman Lotfi-Kamran, Hadi Esmaeilzadeh
Neural acceleration for GPU throughput processors. MICRO (2015)
Pejman Lotfi-Kamran, Boris Grot, Michael Ferdman, Stavros Volos, Yusuf Onur Koçberber, Javier Picorel, Almutaz Adileh, Djordje Jevdjic, Sachin Idgunji, Emre Özer, Babak Falsafi
Scale-out processors. ISCA (2012)
Boris Grot, Damien Hardy, Pejman Lotfi-Kamran, Babak Falsafi, Chrysostomos Nicopoulos, Yiannakis Sazeides
Optimizing Data-Center TCO with Scale-Out Processors. IEEE Micro 32 (5) (2012)
Pejman Lotfi-Kamran, Boris Grot, Babak Falsafi
NOC-Out: Microarchitecting a Scale-Out Processor. MICRO (2012)
Dragomir Milojevic, Sachin Idgunji, Djordje Jevdjic, Emre Özer, Pejman Lotfi-Kamran, Andreas Panteli, Andreas Prodromou, Chrysostomos Nicopoulos, Damien Hardy, Babak Falsafi, Yiannakis Sazeides
Thermal characterization of cloud workloads on a power-efficient server-on-chip. ICCD (2012)
Mohammad Hosseinabady, Pejman Lotfi-Kamran, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan
Single-Event Transient Analysis in High Speed Circuits. ISED (2011)
Michael Ferdman, Pejman Lotfi-Kamran, Ken Balet, Babak Falsafi
Cuckoo directory: A scalable directory for many-core systems. HPCA (2011)
Pejman Lotfi-Kamran, Amir-Mohammad Rahmani, Masoud Daneshtalab, Ali Afzali-Kusha, Zainalabedin Navabi
EDXY - A low cost congestion-aware routing algorithm for network-on-chips. J. Syst. Archit. 56 (7) (2010)
Pejman Lotfi-Kamran, Michael Ferdman, Daniel Crisan, Babak Falsafi
TurboTag: lookup filtering to reduce coherence directory power. ISLPED (2010)
Amir-Mohammad Rahmani, I. Kamali, Pejman Lotfi-Kamran, Ali Afzali-Kusha, Saeed Safari
Negative Exponential Distribution Traffic Pattern for Power/Performance Analysis of Network on Chips. VLSI Design (2009)
Pejman Lotfi-Kamran, Masoud Daneshtalab, Caro Lucas, Zainalabedin Navabi
BARP-A Dynamic Routing Protocol for Balanced Distribution of Traffic in NoCs. DATE (2008)
Pejman Lotfi-Kamran, Mehran Massoumi, Mohammad Mirzaei, Zainalabedin Navabi
Enhanced TED: A New Data Structure for RTL Verification. VLSI Design (2008)
Pejman Lotfi-Kamran, Amir-Mohammad Rahmani, Ali-Asghar Salehpour, Ali Afzali-Kusha, Zainalabedin Navabi
Stall Power Reduction in Pipelined Architecture Processors. VLSI Design (2008)
Mohammad Hosseinabady, Pejman Lotfi-Kamran, Zainalabedin Navabi
Low test application time resource binding for behavioral synthesis. ACM Trans. Design Autom. Electr. Syst. 12 (2) (2007)
Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Pejman Lotfi-Kamran, Zainalabedin Navabi
A UML Based System Level Failure Rate Assessment Technique for SoC Designs. VTS (2007)
Mohammad Hosseinabady, Pejman Lotfi-Kamran, Fabrizio Lombardi, Zainalabedin Navabi
Low overhead DFT using CDFG by modifying controller. IET Comput. Digit. Tech. 1 (4) (2007)
Mohammad Hosseinabady, Pejman Lotfi-Kamran, Giorgio Di Natale, Stefano Di Carlo, Alfredo Benso, Paolo Prinetto
Single-Event Upset Analysis and Protection in High Speed Circuits. ETS (2006)
Arash Hooshmand, Saeed Shamshiri, Mohammad Alisafaee, Bijan Alizadeh, Pejman Lotfi-Kamran, Mostafa Naderi, Zainalabedin Navabi
Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams. ISCAS (1) (2005)
Mohammad Hosseinabady, Pejman Lotfi-Kamran, Pedram A. Riahi, Fabrizio Lombardi, Zainalabedin Navabi
A Flow Graph Technique for DFT Controller Modification. SoCC (2005)
Pejman Lotfi-Kamran, Mohammad Hosseinabady, Hamid Shojaei, Mehran Massoumi, Zainalabedin Navabi
TED+: a data structure for microprocessor verification. ASP-DAC (2005)