Mohammad Hossein Neishaburi

Publication Activity (10 Years)

Years Active: 2007-2015
Publications (10 Years): 0

Top Topics

Agglomerative Hierarchical Clustering

Support Environment

Network On Chip

Top Venues

J. Electron. Test.

J. Syst. Archit.

IEEE Trans. Computers

Publications

Mohammad Hossein Neishaburi, Zeljko Zilic
System on chip failure rate assessment using the executable model of a system. Computing 97 (6) (2015)
Mohammad Hossein Neishaburi, Zeljko Zilic
On a New Mechanism of Trigger Generation for Post-Silicon Debugging. IEEE Trans. Computers 63 (9) (2014)
Mohammad Hossein Neishaburi, Zeljko Zilic
A Fault Tolerant Hierarchical Network on Chip Router Architecture. J. Electron. Test. 29 (4) (2013)
Mohammad Hossein Neishaburi, Zeljko Zilic
NISHA: A fault-tolerant NoC router enabling deadlock-free Interconnection of Subnets in Hierarchical Architectures. J. Syst. Archit. 59 (7) (2013)
Mohammad Hossein Neishaburi, Zeljko Zilic
An infrastructure for debug using clusters of assertion-checkers. Microelectron. Reliab. 52 (11) (2012)
Mohammad Hossein Neishaburi, Zeljko Zilic
An enhanced debug-aware network interface for Network-on-Chip. ISQED (2012)
Mohammad Hossein Neishaburi, Zeljko Zilic
On Failure Rate Assessment Using an Executable Model of the System. DSD (2011)
Mohammad Hossein Neishaburi, Zeljko Zilic
Hierarchical Embedded Logic Analyzer for Accurate Root-Cause Analysis. DFT (2011)
Mohammad Hossein Neishaburi, Zeljko Zilic
A Fault Tolerant Hierarchical Network on Chip Router Architecture. DFT (2011)
Mohammad Hossein Neishaburi, Zeljko Zilic
A distributed AXI-based platform for post-silicon validation. VTS (2011)
Mohammad Hossein Neishaburi, Zeljko Zilic
ERAVC: Enhanced reliability aware NoC router. ISQED (2011)
Mohammad Hossein Neishaburi, Zeljko Zilic
Debug Aware AXI-based Network Interface. DFT (2011)
Mohammad Hossein Neishaburi, Zeljko Zilic
Enabling efficient post-silicon debug by clustering of hardware-assertions. DATE (2010)
Mohammad Hossein Neishaburi, Zeljko Zilic
Reliability aware NoC router architecture using input channel buffer sharing. ACM Great Lakes Symposium on VLSI (2009)
Masoumeh Ebrahimi, Masoud Daneshtalab, Mohammad Hossein Neishaburi, Siamak Mohammadi, Ali Afzali-Kusha, Juha Plosila, Hannu Tenhunen
An efficent dynamic multicast routing protocol for distributing traffic in NOCs. DATE (2009)
Mohammad Reza Kakoee, Mohammad Hossein Neishaburi, Siamak Mohammadi
Graph based test case generation for TLM functional verification. Microprocess. Microsystems 32 (5-6) (2008)
Mohammad Hossein Neishaburi, Masoud Daneshtalab, Majid Nabi, Siamak Mohammadi
System Level Voltage Scheduling Technique Using UML-RT Model. AICCSA (2007)
Alireza Aminlou, Maryam Homayouni, Mohammad Hossein Neishaburi, Siamak Mohammadi
A Superior Low Complexity Rate Control Algorithm. AICCSA (2007)
Mohammad Reza Kakoee, Mohammad Hossein Neishaburi, Masoud Daneshtalab, Saeed Safari, Zainalabedin Navabi
On-Chip Verification of NoCs Using Assertion Processors. DSD (2007)
Mohammad Hossein Neishaburi, Mohammad Reza Kakoee, Masoud Daneshtalab, Saeed Safari
HW/SW architecture for soft-error cancellation in real-time operating system. IEICE Electron. Express 4 (23) (2007)
Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Zainalabedin Navabi, Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Giorgio Di Natale
Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC. IOLTS (2007)
Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Pejman Lotfi-Kamran, Zainalabedin Navabi
A UML Based System Level Failure Rate Assessment Technique for SoC Designs. VTS (2007)
Masoud Daneshtalab, A. Pedram, Mohammad Hossein Neishaburi, Mohammad Riazati, Ali Afzali-Kusha, Siamak Mohammadi
Distributing Congestions in NoCs through a Dynamic Routing Algorithm based on Input and Output Selections. VLSI Design (2007)
Mohammad Hossein Neishaburi, Masoud Daneshtalab, Mohammad Reza Kakoee, Saeed Safari
Improving Robustness of Real-Time Operating Systems (RTOS) Services Related to Soft-Errors. AICCSA (2007)
Mohammad Hossein Neishaburi, Mohammad Reza Kakoee, Masoud Daneshtalab, Saeed Safari, Zainalabedin Navabi
A HW/SW Architecture to Reduce the Effects of Soft-Errors in Real-Time Operating System Services. DDECS (2007)
Mohammad Reza Kakoee, Mohammad Hossein Neishaburi, Masoud Daneshtalab, Saeed Safari
Assertion based design error diagnosis for core-based SoCs. SoCC (2007)
Mohammad Reza Kakoee, Mohammad Hossein Neishaburi, Siamak Mohammadi
Functional Test-Case Generation by a Control Transaction Graph for TLM Verification. DSD (2007)