Low-Cost Microarchitectural Techniques for Enhancing the Prediction of Return Addresses on High-Performance Trace Cache Processors.
Yunhe ShiEmre ÖzerDavid GreggPublished in: ISCIS (2006)
Keyphrases
- embedded processors
- single chip
- low cost
- low power
- prediction accuracy
- cost effective
- parallel implementation
- signal processor
- highly parallel
- prediction error
- distributed memory
- low power consumption
- multithreading
- prediction model
- neural network
- highly efficient
- image sensor
- power consumption
- high speed
- memory subsystem
- message passing
- embedded systems
- parallel processing
- prediction algorithm
- query processing
- data structure