Ronald G. Dreslinski

ORCID

Publication Activity (10 Years)

Years Active: 2005-2024
Publications (10 Years): 95

Top Venues

Publications

Anish Krishnakumar, Hanguang Yu, Tutu Ajayi, A. Alper Goksoy, Vishrut Pandey, Joshua Mack, Md Sahil Hassan, Kuan-Yu Chen, Chaitali Chakrabarti, Daniel W. Bliss, Ali Akoglu, Hun-Seok Kim, Ronald G. Dreslinski, David T. Blaauw, Ümit Y. Ogras
FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs). IEEE Des. Test 41 (1) (2024)
Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge
Rethinking DRAM's Page Mode With STT-MRAM. IEEE Trans. Computers 72 (5) (2023)
Andrew D. Loveless, Linh Thi Xuan Phan, Lisa Erickson, Ronald G. Dreslinski, Baris Kasikci
CrossTalk: Making Low-Latency Fault Tolerance Cheap by Exploiting Redundant Networks. ACM Trans. Embed. Comput. Syst. 22 (5s) (2023)
Deepika Natarajan, Andrew D. Loveless, Wei Dai, Ronald G. Dreslinski
Chex-Mix: Combining Homomorphic Encryption with Trusted Execution Environments for Oblivious Inference in the Cloud. EuroS&P (2023)
Haojie Ye, Sanketh Vedula, Yuhan Chen, Yichen Yang, Alex Bronstein, Ronald G. Dreslinski, Trevor N. Mudge, Nishil Talati
GRACE: A Scalable Graph-Based Approach to Accelerating Recommendation Model Inference. ASPLOS (3) (2023)
Serafina Kamp, Morteza Fayazi, Zineb Benameur-El Youbi, Shuyan Yu, Ronald G. Dreslinski
Open Information Extraction: A Review of Baseline Techniques, Approaches, and Applications. CoRR (2023)
Yuhan Chen, Haojie Ye, Sanketh Vedula, Alex M. Bronstein, Ronald G. Dreslinski, Trevor N. Mudge, Nishil Talati
Demystifying Graph Sparsification Algorithms in Graph Properties Preservation. Proc. VLDB Endow. 17 (3) (2023)
Morteza Fayazi, Morteza Tavakoli Taba, Ehsan Afshari, Ronald G. Dreslinski
AnGeL: Fully-Automated Analog Circuit Generator Using a Neural Network Assisted Semi-Supervised Learning Approach. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (11) (2023)
Heewoo Kim, Haojie Ye, Trevor N. Mudge, Ronald G. Dreslinski, Nishil Talati
RecPIM: A PIM-Enabled DRAM-RRAM Hybrid Memory System For Recommendation Models. ISLPED (2023)
Yuhan Chen, Haojie Ye, Sanketh Vedula, Alex M. Bronstein, Ronald G. Dreslinski, Trevor N. Mudge, Nishil Talati
Demystifying Graph Sparsification Algorithms in Graph Properties Preservation. CoRR (2023)
Andrew D. Loveless, Linh Thi Xuan Phan, Ronald G. Dreslinski, Baris Kasikci
PCSPOOF: Compromising the Safety of Time-Triggered Ethernet. SP (2023)
Morteza Fayazi, Morteza Tavakoli Taba, Amirata Tabatabavakili, Ehsan Afshari, Ronald G. Dreslinski
FuNToM: Functional Modeling of RF Circuits Using a Neural Network Assisted Two-Port Analysis Method. CoRR (2023)
Hiwot Tadese Kassa, Paul Johnson, Jason Akers, Mrinmoy Ghosh, Andrew Tulloch, Dheevatsa Mudigere, Jongsoo Park, Xing Liu, Ronald G. Dreslinski, Ehsan K. Ardestani
MTrainS: Improving DLRM training efficiency using heterogeneous memories. CoRR (2023)
Yichen Yang, Jingtao Li, Nishil Talati, Subhankar Pal, Siying Feng, Chaitali Chakrabarti, Trevor N. Mudge, Ronald G. Dreslinski
Accelerating Graph Analytics on a Reconfigurable Architecture with a Data-Indirect Prefetcher. CoRR (2023)
Morteza Fayazi, Morteza Tavakoli Taba, Amirata Tabatabavakili, Ehsan Afshari, Ronald G. Dreslinski
FuNToM: Functional Modeling of RF Circuits Using a Neural Network Assisted Two-Port Analysis Method. ICCAD (2023)
Axel Feldmann, Nikola Samardzic, Aleksandar Krastev, Srinivas Devadas, Ronald G. Dreslinski, Chris Peikert, Daniel Sánchez
An Architecture to Accelerate Computation on Encrypted Data. IEEE Micro 42 (4) (2022)
Hiwot Tadese Kassa, Jason Akers, Mrinmoy Ghosh, Zhichao Cao, Vaibhav Gogte, Ronald G. Dreslinski
Power-optimized Deployment of Key-value Stores Using Storage Class Memory. ACM Trans. Storage 18 (2) (2022)
Aporva Amarnath, Subhankar Pal, Hiwot Kassa, Augusto Vega, Alper Buyuktosunoglu, Hubertus Franke, John-David Wellman, Ronald G. Dreslinski, Pradip Bose
HetSched: Quality-of-Mission Aware Scheduling for Autonomous Vehicle SoCs. CoRR (2022)
Zach Colter, Morteza Fayazi, Zineb Benameur-El Youbi, Serafina Kamp, Shuyan Yu, Ronald G. Dreslinski
Tablext: A combined neural network and heuristic based table extractor. Array 15 (2022)
Yan Xiong, J. Li, David T. Blaauw, H.-S. Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
Improving Energy Efficiency of Convolutional Neural Networks on Multi-core Architectures through Run-time Reconfiguration. ISCAS (2022)
Leul Belayneh, Haojie Ye, Kuan-Yu Chen, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski, Nishil Talati
Locality-Aware Optimizations for Improving Remote Memory Latency in Multi-GPU Systems. PACT (2022)
Stephen A. Zekany, Thomas F. Larsen, Ronald G. Dreslinski, Thomas F. Wenisch
Finding and Indexing Vehicle Maneuvers From Dashboard Camera Video. IEEE Trans. Intell. Transp. Syst. 23 (9) (2022)
Nishil Talati, Haojie Ye, Yichen Yang, Leul Belayneh, Kuan-Yu Chen, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
NDMiner: accelerating graph pattern mining using near data processing. ISCA (2022)
Siying Feng, Xin He, Kuan-Yu Chen, Liu Ke, Xuan Zhang, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
MeNDA: a near-memory multi-way merge solution for sparse transposition and dataflows. ISCA (2022)
Nishil Talati, Haojie Ye, Sanketh Vedula, Kuan-Yu Chen, Yuhan Chen, Daniel Liu, Yichao Yuan, David T. Blaauw, Alex Bronstein, Trevor N. Mudge, Ronald G. Dreslinski
Mint: An Accelerator For Mining Temporal Motifs. MICRO (2022)
Javad Bagherzadeh, Aporva Amarnath, Jielun Tan, Subhankar Pal, Ronald G. Dreslinski
A Holistic Solution for Reliability of 3D Parallel Systems. ACM J. Emerg. Technol. Comput. Syst. 18 (1) (2022)
Heewoo Kim, Javad Bagherzadeh, Ronald G. Dreslinski
SiC Processors for Extreme High- Temperature Venus Surface Exploration. DATE (2022)
Yufan Yue, Tutu Ajayi, Xueyang Liu, Peiwen Xing, Zihan Wang, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
A Unified Forward Error Correction Accelerator for Multi-Mode Turbo, LDPC, and Polar Decoding. ISLPED (2022)
Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory. IEEE J. Solid State Circuits 57 (4) (2022)
Daniel W. Bliss, Tutu Ajayi, Ali Akoglu, I. Aliyev, Toygun Basaklar, Leul Belayneh, David T. Blaauw, John Brunhaver, Chaitali Chakrabarti, L. Chang, Kuan-Yu Chen, M.-H. Chen, Xing Chen, Alex R. Chiriyath, Alhad Daftardar, Ronald G. Dreslinski, Arindam Dutta, Allen-Jasmin Farcas, Y. Fu, A. Alper Goksoy, X. He, Md. S. Hassan, Andrew Herschfelt, Jacob Holtom, H.-S. Kim, A. N. Krishnakumar, Y. Li, Owen Ma, Joshua Mack, Saurav Mallik, Sumit K. Mandal, Radu Marculescu, B. McCall, Trevor N. Mudge, Ümit Y. Ogras, V. Pandey, S. Siddiqui, Yu-Hsiu Sun, Adarsh Venkataramani, X. Wei, B. R. Willis, Hanguang Yu, Yufan Yue
Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor. ISCAS (2022)
Xin He, Kuan-Yu Chen, Siying Feng, Hun-Seok Kim, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge
Squaring the circle: Executing Sparse Matrix Computations on FlexTPU - A TPU-Like Processor. PACT (2022)
Kuan-Yu Chen, Chi-Sheng Yang, Yu-Hsiu Sun, Chien-Wei Tseng, Morteza Fayazi, Xin He, Siying Feng, Yufan Yue, Trevor N. Mudge, Ronald G. Dreslinski, Hun-Seok Kim, David T. Blaauw
A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Processor for Wireless Communication and Linear-Algebra Kernels in 12nm FINFET. VLSI Technology and Circuits (2022)
Morteza Fayazi, Zachary Colter, Zineb Benameur-El Youbi, Javad Bagherzadeh, Tutu Ajayi, Ronald G. Dreslinski
FASCINET: A Fully Automated Single-Board Computer Generator Using Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (12) (2022)
Heewoo Kim, Aporva Amarnath, Javad Bagherzadeh, Nishil Talati, Ronald G. Dreslinski
A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors. ACM J. Emerg. Technol. Comput. Syst. 17 (3) (2021)
Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm. CoRR (2021)
Deepika Natarajan, Wei Dai, Ronald G. Dreslinski
CHEX-MIX: Combining Homomorphic Encryption with Trusted Execution Environments for Two-party Oblivious Inference in the Cloud. IACR Cryptol. ePrint Arch. 2021 (2021)
Nishil Talati, Kyle May, Armand Behroozi, Yichen Yang, Kuba Kaszyk, Christos Vasiladiotis, Tarunesh Verma, Lu Li, Brandon Nguyen, Jiawen Sun, John Magnus Morton, Agreen Ahmadi, Todd M. Austin, Michael F. P. O'Boyle, Scott A. Mahlke, Trevor N. Mudge, Ronald G. Dreslinski
Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads Using Hardware-Software Co-Design. HPCA (2021)
Stephen A. Zekany, Jielun Tan, James A. Connelly, Ronald G. Dreslinski
RISC-V Reward: Building Out-of-Order Processors in a Computer Architecture Design Course with an Open-Source ISA. SIGCSE (2021)
Hyochan An, Sam Schiferl, Siddharth Venkatesan, Tim Wesley, Qirui Zhang, Jingcheng Wang, Kyojin Choo, Shiyu Liu, Bowen Liu, Ziyun Li, Luyao Gong, Hengfei Zhong, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim, Dennis Sylvester
An Ultra-Low-Power Image Signal Processor for Hierarchical Image Recognition With Deep Neural Networks. IEEE J. Solid State Circuits 56 (4) (2021)
Subhankar Pal, Aporva Amarnath, Siying Feng, Michael F. P. O'Boyle, Ronald G. Dreslinski, Christophe Dubach
SparseAdapt: Runtime Control for Sparse Linear Algebra on a Reconfigurable Accelerator. MICRO (2021)
Morteza Fayazi, Zachary Colter, Ehsan Afshari, Ronald G. Dreslinski
Applications of Artificial Intelligence on the Modeling and Optimization for Analog and Mixed-Signal Circuits: A Review. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (6) (2021)
Nikola Samardzic, Axel Feldmann, Aleksandar Krastev, Srinivas Devadas, Ronald G. Dreslinski, Christopher Peikert, Daniel Sánchez
F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption. MICRO (2021)
Zach Colter, Morteza Fayazi, Zineb Benameur-El, Serafina Kamp, Shuyan Yu, Ronald G. Dreslinski
Tablext: A Combined Neural Network And Heuristic Based Table Extractor. CoRR (2021)
Andrew D. Loveless, Ronald G. Dreslinski, Baris Kasikci, Linh Thi Xuan Phan
IGOR: Accelerating Byzantine Fault Tolerance for Real-Time Systems with Eager Execution. RTAS (2021)
Siying Feng, Jiawen Sun, Subhankar Pal, Xin He, Kuba Kaszyk, Dong-Hyeon Park, John Magnus Morton, Trevor N. Mudge, Murray Cole, Michael F. P. O'Boyle, Chaitali Chakrabarti, Ronald G. Dreslinski
CoSPARSE: A Software and Hardware Reconfigurable SpMV Framework for Graph Analytics. DAC (2021)
Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm. VLSI Circuits (2021)
Nishil Talati, Di Jin, Haojie Ye, Ajay Brahmakshatriya, Ganesh S. Dasika, Saman P. Amarasinghe, Trevor N. Mudge, Danai Koutra, Ronald G. Dreslinski
A Deep Dive Into Understanding The Random Walk-Based Temporal Graph Learning. IISWC (2021)
Hiwot Tadese Kassa, Jason Akers, Mrinmoy Ghosh, Zhichao Cao, Vaibhav Gogte, Ronald G. Dreslinski
Improving Performance of Flash Based Key-Value Stores Using Storage Class Memory as a Volatile Memory Extension. USENIX Annual Technical Conference (2021)
Axel Feldmann, Nikola Samardzic, Aleksandar Krastev, Srini Devadas, Ronald G. Dreslinski, Karim Eldefrawy, Nicholas Genise, Chris Peikert, Daniel Sánchez
F1: A Fast and Programmable Accelerator for Fully Homomorphic Encryption (Extended Version). CoRR (2021)
Hyochan An, Siddharth Venkatesan, Sam Schiferl, Tim Wesley, Qirui Zhang, Jingcheng Wang, Kyojin Choo, Shiyu Liu, Bowen Liu, Ziyun Li, Hengfei Zhong, Luyao Gong, David T. Blaauw, Ronald G. Dreslinski, Dennis Sylvester, Hun-Seok Kim
A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge. VLSI Circuits (2020)
Javad Bagherzadeh, Aporva Amarnath, Jielun Tan, Subhankar Pal, Ronald G. Dreslinski
R2D3: A Reliability Engine for 3D Parallel Systems. DAC (2020)
Subhankar Pal, Kuba Kaszyk, Siying Feng, Björn Franke, Murray Cole, Michael F. P. O'Boyle, Trevor N. Mudge, Ronald G. Dreslinski
HETSIM: Simulating Large-Scale Heterogeneous Systems using a Trace-driven, Synchronization and Dependency-Aware Framework. IISWC (2020)
A. Soorishetty, Jian Zhou, Subhankar Pal, David T. Blaauw, H. Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
Accelerating Linear Algebra Kernels on a Massively Parallel Reconfigurable Architecture. ICASSP (2020)
Xin He, Subhankar Pal, Aporva Amarnath, Siying Feng, Dong-Hyeon Park, Austin Rovinski, Haojie Ye, Kuan-Yu Chen, Ronald G. Dreslinski, Trevor N. Mudge
Sparse-TPU: adapting systolic arrays for sparse matrices. ICS (2020)
Subhankar Pal, Siying Feng, Dong-Hyeon Park, Sung Kim, Aporva Amarnath, Chi-Sheng Yang, Xin He, Jonathan Beaumont, Kyle May, Yan Xiong, Kuba Kaszyk, John Magnus Morton, Jiawen Sun, Michael F. P. O'Boyle, Murray Cole, Chaitali Chakrabarti, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski
Transmuter: Bridging the Efficiency Gap using Memory and Dataflow Reconfiguration. PACT (2020)
Tutu Ajayi, Sumanth Kamineni, Yaswanth K. Cherivirala, Morteza Fayazi, Kyumin Kwon, Mehdi Saligane, Shourya Gupta, Chien-Hen Chen, Dennis Sylvester, David T. Blaauw, Ronald G. Dreslinski, Benton H. Calhoun, David D. Wentzloff
An Open-source Framework for Autonomous SoC Design with Analog Block Generation. VLSI-SOC (2020)
Deepika Natarajan, Ronald G. Dreslinski
Performance Characterization of Lattice-Based Cryptography Workloads. ISPASS (2020)
Yichen Yang, Haojie Ye, Yuhan Chen, Xueyang Liu, Nishil Talati, Xin He, Trevor N. Mudge, Ronald G. Dreslinski
CoPTA: Contiguous Pattern Speculating TLB Architecture. SAMOS (2020)
Dong-Hyeon Park, Subhankar Pal, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael Bedford Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski
A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator. IEEE J. Solid State Circuits 55 (4) (2020)
Brendan L. West, Jian Zhou, Ronald G. Dreslinski, Oliver D. Kripfgans, J. Brian Fowlkes, Chaitali Chakrabarti, Thomas F. Wenisch
Tetris: Using Software/Hardware Co-Design to Enable Handheld, Physics-Limited 3D Plane-Wave Ultrasound Imaging. IEEE Trans. Computers 69 (8) (2020)
Yan Xiong, Jian Zhou, Subhankar Pal, David T. Blaauw, H. S. Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti
Accelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture. ISCAS (2020)
Augusto Vega, Aporva Amarnath, John-David Wellman, Hiwot Kassa, Subhankar Pal, Hubertus Franke, Alper Buyuktosunoglu, Ronald G. Dreslinski, Pradip Bose
STOMP: A Tool for Evaluation of Scheduling Policies in Heterogeneous Multi-Processors. CoRR (2020)
Andrew D. Loveless, Ronald G. Dreslinski, Baris Kasikci
Optimal and Error-Free Multi-Valued Byzantine Consensus Through Parallel Execution. IACR Cryptol. ePrint Arch. 2020 (2020)
Austin Rovinski, Chun Zhao, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang, Ian Galton, Christopher Batten, Michael B. Taylor, Ronald G. Dreslinski
A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS. VLSI Circuits (2019)
Brendan L. West, Jian Zhou, Ronald G. Dreslinski, J. Brian Fowlkes, Oliver Kripfgans, Chaitali Chakrabarti, Thomas F. Wenisch
Tetris: A Streaming Accelerator for Physics-Limited 3D Plane-Wave Ultrasound Imaging. DAC (2019)
Aporva Amarnath, Javad Bagherzadeh, Jielun Tan, Ronald G. Dreslinski
3DTUBE: A Design Framework for High-Variation Carbon Nanotube-based Transistor Technology. ISLPED (2019)
Subhankar Pal, Dong-Hyeon Park, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael B. Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski
A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm. VLSI Circuits (2019)
Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Ronald G. Dreslinski, Trevor N. Mudge
SMART: STT-MRAM architecture for smart activation and sensing. MEMSYS (2019)
Siying Feng, Subhankar Pal, Yichen Yang, Ronald G. Dreslinski
Parallelism Analysis of Prominent Desktop Applications: An 18- Year Perspective. ISPASS (2019)
Stephen A. Zekany, Ronald G. Dreslinski, Thomas F. Wenisch
Classifying Ego-Vehicle Road Maneuvers from Dashcam Video. ITSC (2019)
Byoungchan Oh, Nam Sung Kim, Jeongseob Ahn, Bingchao Li, Ronald G. Dreslinski, Trevor N. Mudge
A load balancing technique for memory channels. MEMSYS (2018)
Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawaj, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald G. Dreslinski, Christopher Batten, Michael B. Taylor
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. IEEE Micro 38 (2) (2018)
Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin P. Kempke, Luyao Gong, Zhengya Zhang, Ronald G. Dreslinski, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim
A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles. IEEE J. Solid State Circuits 53 (1) (2018)
Subhankar Pal, Jonathan Beaumont, Dong-Hyeon Park, Aporva Amarnath, Siying Feng, Chaitali Chakrabarti, Hun-Seok Kim, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski
OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator. HPCA (2018)
Aporva Amarnath, Siying Feng, Subhankar Pal, Tutu Ajayi, Austin Rovinski, Ronald G. Dreslinski
A carbon nanotube transistor based RISC-V processor using pass transistor logic. ISLPED (2017)
Suyoung Bang, Jingcheng Wang, Ziyun Li, Cao Gao, Yejoong Kim, Qing Dong, Yen-Po Chen, Laura Fick, Xun Sun, Ronald G. Dreslinski, Trevor N. Mudge, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester
14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence. ISSCC (2017)
Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin P. Kempke, Shijia Yang, Zhengya Zhang, Ronald G. Dreslinski, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim
3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation. ISSCC (2017)
Chang-Hong Hsu, Yunqi Zhang, Michael A. Laurenzano, David Meisner, Thomas F. Wenisch, Ronald G. Dreslinski, Jason Mars, Lingjia Tang
Reining in Long Tails in Warehouse-Scale Computers with Quick Voltage Boosting Using Adrenaline. ACM Trans. Comput. Syst. 35 (1) (2017)
Nathaniel Ross Pinckney, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw, Lucian Shifren, Brian Cline, Saurabh Sinha
Impact of FinFET on Near-Threshold Voltage Scalability. IEEE Des. Test 34 (2) (2017)
Pat Pannuto, Yoonmyung Lee, Ye-Sheng Kuo, Zhiyoong Foo, Benjamin P. Kempke, Gyouho Kim, Ronald G. Dreslinski, David T. Blaauw, Prabal Dutta
MBus: A System Integration Bus for the Modular Microscale Computing Class. IEEE Micro 36 (3) (2016)
Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Hailong Yang, Yiping Kang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars
Designing Future Warehouse-Scale Computers for Sirius, an End-to-End Voice and Vision Personal Assistant. ACM Trans. Comput. Syst. 34 (1) (2016)
Yajing Chen, Nikolaos Chiotellis, Li-Xuan Chuo, Carl Pfeiffer, Yao Shi, Ronald G. Dreslinski, Anthony Grbic, Trevor N. Mudge, David D. Wentzloff, David T. Blaauw, Hun-Seok Kim
Energy-Autonomous Wireless Communication for Millimeter-Scale Internet-of-Things Sensor Nodes. IEEE J. Sel. Areas Commun. 34 (12) (2016)
Nathaniel Ross Pinckney, Lucian Shifren, Brian Cline, Saurabh Sinha, Supreet Jeloka, Ronald G. Dreslinski, Trevor N. Mudge, Dennis Sylvester, David T. Blaauw
Near-threshold computing in FinFET technologies: opportunities for improved voltage scalability. DAC (2016)
Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch, Scott A. Mahlke
Exploring Fine-Grained Heterogeneity with Composite Cores. IEEE Trans. Computers 65 (2) (2016)
Nilmini Abeyratne, Hsing Min Chen, Byoungchan Oh, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge
Checkpointing Exascale Memory Systems with Existing Memory Technologies. MEMSYS (2016)
Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars
Sirius Implications for Future Warehouse-Scale Computers. IEEE Micro 36 (3) (2016)
Yajing Chen, Shengshuo Lu, Hun-Seok Kim, David T. Blaauw, Ronald G. Dreslinski, Trevor N. Mudge
A low power software-defined-radio baseband processor for the Internet of Things. HPCA (2016)
Byoungchan Oh, Nilmini Abeyratne, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge
Enhancing DRAM Self-Refresh for Idle Power Reduction. ISLPED (2016)
Qi Zheng, Yajing Chen, Hyunseok Lee, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge
Using Graphics Processing Units in an LTE Base Station. J. Signal Process. Syst. 78 (1) (2015)
Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor N. Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars
Sirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers. ASPLOS (2015)
John Kloosterman, Jonathan Beaumont, Mick Wollman, Ankit Sethia, Ronald G. Dreslinski, Trevor N. Mudge, Scott A. Mahlke
WarpPool: sharing requests with inter-warp coalescing for throughput processors. MICRO (2015)
Johann Hauswald, Yiping Kang, Michael A. Laurenzano, Quan Chen, Cheng Li, Trevor N. Mudge, Ronald G. Dreslinski, Jason Mars, Lingjia Tang
DjiNN and Tonic: DNN as a service and its implications for future warehouse scale computers. ISCA (2015)
Cao Gao, Anthony Gutierrez, Madhav Rajan, Ronald G. Dreslinski, Trevor N. Mudge, Carole-Jean Wu
A study of mobile device utilization. ISPASS (2015)
Pat Pannuto, Yoonmyung Lee, Ye-Sheng Kuo, Zhiyoong Foo, Benjamin P. Kempke, Gyouho Kim, Ronald G. Dreslinski, David T. Blaauw, Prabal Dutta
MBus: an ultra-low power interconnect bus for next generation nanopower systems. ISCA (2015)
Chang-Hong Hsu, Yunqi Zhang, Michael A. Laurenzano, David Meisner, Thomas F. Wenisch, Jason Mars, Lingjia Tang, Ronald G. Dreslinski
Adrenaline: Pinpointing and reining in tail queries with quick voltage boosting. HPCA (2015)
Anthony Gutierrez, Michael Cieslak, Bharan Giridhar, Ronald G. Dreslinski, Luis Ceze, Trevor N. Mudge
Integrated 3D-stacked server designs for increasing physical density of key-value stores. ASPLOS (2014)
Anthony Gutierrez, Joseph Pusdesris, Ronald G. Dreslinski, Trevor N. Mudge, Chander Sudanthi, Christopher D. Emmons, Mitchell Hayenga, Nigel C. Paver
Sources of error in full-system simulation. ISPASS (2014)
Cao Gao, Anthony Gutierrez, Ronald G. Dreslinski, Trevor N. Mudge, Krisztián Flautner, Geoffrey Blake
A study of Thread Level Parallelism on mobile devices. ISPASS (2014)
Nilmini Abeyratne, Supreet Jeloka, Yiping Kang, David T. Blaauw, Ronald G. Dreslinski, Reetuparna Das, Trevor N. Mudge
Quality-of-Service for a High-Radix Switch. DAC (2014)
Supreet Jeloka, Reetuparna Das, Ronald G. Dreslinski, Trevor N. Mudge, David T. Blaauw
Hi-Rise: A High-Radix Switch for 3D Integration with Single-Cycle Arbitration. MICRO (2014)

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Ronald G. Dreslinski