Gai Liu

Publication Activity (10 Years)

Years Active: 2014-2023
Publications (10 Years): 17

Top Topics

Design Methodologies

Benchmark Suite

Mobile Platform

Iterative Optimization

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

Publications

Zhichao Guan, Xing Zhong, Guo Zhang, Yonghua Jiang, Gai Liu
Geometric Exterior Elements Calibration of Jilin-1 Linear Array Satellites Based on Star Observation. IGARSS (2023)
Gai Liu, Umar Farooq, Chengyan Zhao, Xia Liu, Nian Sun
Linker Code Size Optimization for Native Mobile Applications. CC (2023)
Gai Liu, Umar Farooq, Chengyan Zhao, Xia Liu, Nian Sun
Linker Code Size Optimization for Native Mobile Applications. CoRR (2022)
Jason Cong, Jason Lau, Gai Liu, Stephen Neuendorffer, Peichen Pan, Kees A. Vissers, Zhiru Zhang
FPGA HLS Today: Successes, Challenges, and Opportunities. ACM Trans. Reconfigurable Technol. Syst. 15 (4) (2022)
Gai Liu, Joseph Primmer, Zhiru Zhang
Rapid Generation of High-Qality RISC-V Processors from Functional Instruction Set Specifications. DAC (2019)
Gai Liu, Zhiru Zhang
PIMap: A Flexible Framework for Improving LUT-Based Technology Mapping via Parallelized Iterative Optimization. ACM Trans. Reconfigurable Technol. Syst. 11 (4) (2019)
Steve Dai, Gai Liu, Zhiru Zhang
A Scalable Approach to Exact Resource-Constrained Scheduling Based on a Joint SDC and SAT Formulation. FPGA (2018)
Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawaj, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald G. Dreslinski, Christopher Batten, Michael B. Taylor
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. IEEE Micro 38 (2) (2018)
Yuan Zhou, Udit Gupta, Steve Dai, Ritchie Zhao, Nitish Kumar Srivastava, Hanchen Jin, Joseph Featherston, Yi-Hsiang Lai, Gai Liu, Gustavo Angarita Velasquez, Wenping Wang, Zhiru Zhang
Rosetta: A Realistic High-Level Synthesis Benchmark Suite for Software Programmable FPGAs. FPGA (2018)
Gai Liu, Ecenur Ustun, Shaojie Xiang, Chang Xu, Guojie Luo, Zhiru Zhang
DATuner: An Extensible Distributed Autotuning Framework for FPGA Design and Design Automation: (Abstract Only). FPGA (2018)
Steve Dai, Ritchie Zhao, Gai Liu, Shreesha Srinath, Udit Gupta, Christopher Batten, Zhiru Zhang
Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis. FPGA (2017)
Gai Liu, Mingxing Tan, Steve Dai, Ritchie Zhao, Zhiru Zhang
Architecture and Synthesis for Area-Efficient Pipelining of Irregular Loop Nests. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (11) (2017)
Steve Dai, Gai Liu, Ritchie Zhao, Zhiru Zhang
Enabling adaptive loop pipelining in high-level synthesis. ACSSC (2017)
Gai Liu, Zhiru Zhang
A Parallelized Iterative Improvement Approach to Area Optimization for LUT-Based Technology Mapping. FPGA (2017)
Gai Liu, Zhiru Zhang
Statistically certified approximate logic synthesis. ICCAD (2017)
Chang Xu, Gai Liu, Ritchie Zhao, Stephen Yang, Guojie Luo, Zhiru Zhang
A Parallel Bandit-Based Approach for Autotuning FPGA Compilation. FPGA (2017)
Ritchie Zhao, Gai Liu, Shreesha Srinath, Christopher Batten, Zhiru Zhang
Improving high-level synthesis with decoupled data structure optimization. DAC (2016)
Mingxing Tan, Gai Liu, Ritchie Zhao, Steve Dai, Zhiru Zhang
ElasticFlow: A Complexity-Effective Approach for Pipelining Irregular Loop Nests. ICCAD (2015)
Gai Liu, Zhiru Zhang
A reconfigurable analog substrate for highly efficient maximum flow computation. DAC (2015)
Shreesha Srinath, Berkin Ilbeyi, Mingxing Tan, Gai Liu, Zhiru Zhang, Christopher Batten
Architectural Specialization for Inter-Iteration Loop Dependence Patterns. MICRO (2014)
Gai Liu, Ye Tao, Mingxing Tan, Zhiru Zhang
CASA: correlation-aware speculative adders. ISLPED (2014)