Ritchie Zhao

Publication Activity (10 Years)

Years Active: 2015-2023
Publications (10 Years): 23

Top Topics

Design Methodologies

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Top Venues

Publications

Bita Darvish Rouhani, Ritchie Zhao, Venmugil Elango, Rasoul Shafipour, Mathew Hall, Maral Mesmakhosroshahi, Ankit More, Levi Melnick, Maximilian Golub, Girish Varatkar, Lai Shao, Gaurav Kolhe, Dimitry Melts, Jasmine Klar, Renee L'Heureux, Matt Perry, Doug Burger, Eric S. Chung, Zhaoxia (Summer) Deng, Sam Naghshineh, Jongsoo Park, Maxim Naumov
With Shared Microexponents, A Little Shifting Goes a Long Way. ISCA (2023)
Bita Rouhani, Ritchie Zhao, Venmugil Elango, Rasoul Shafipour, Mathew Hall, Maral Mesmakhosroshahi, Ankit More, Levi Melnick, Maximilian Golub, Girish Varatkar, Lei Shao, Gaurav Kolhe, Dimitry Melts, Jasmine Klar, Renee L'Heureux, Matt Perry, Doug Burger, Eric S. Chung, Zhaoxia Deng, Sam Naghshineh, Jongsoo Park, Maxim Naumov
Shared Microexponents: A Little Shifting Goes a Long Way. CoRR (2023)
Bita Darvish Rouhani, Ritchie Zhao, Ankit More, Mathew Hall, Alireza Khodamoradi, Summer Deng, Dhruv Choudhary, Marius Cornea, Eric Dellinger, Kristof Denolf, Dusan Stosic, Venmugil Elango, Maximilian Golub, Alexander Heinecke, Phil James-Roxby, Dharmesh Jani, Gaurav Kolhe, Martin Langhammer, Ada Li, Levi Melnick, Maral Mesmakhosroshahi, Andres Rodriguez, Michael Schulte, Rasoul Shafipour, Lei Shao, Michael Y. Siu, Pradeep Dubey, Paulius Micikevicius, Maxim Naumov, Colin Verilli, Ralph Wittig, Doug Burger, Eric S. Chung
Microscaling Data Formats for Deep Learning. CoRR (2023)
Yichi Zhang, Ritchie Zhao, Weizhe Hua, Nayun Xu, G. Edward Suh, Zhiru Zhang
Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations. CoRR (2020)
Yichi Zhang, Ritchie Zhao, Weizhe Hua, Nayun Xu, G. Edward Suh, Zhiru Zhang
Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations. ICLR (2020)
Bita Darvish Rouhani, Daniel Lo, Ritchie Zhao, Ming Liu, Jeremy Fowers, Kalin Ovtcharov, Anna Vinogradsky, Sarah Massengill, Lita Yang, Ray Bittner, Alessandro Forin, Haishan Zhu, Taesik Na, Prerak Patel, Shuai Che, Lok Chand Koppaka, Xia Song, Subhojit Som, Kaustav Das, Saurabh T., Steven K. Reinhardt, Sitaram Lanka, Eric S. Chung, Doug Burger
Pushing the Limits of Narrow Precision Inferencing at Cloud Scale with Microsoft Floating Point. NeurIPS (2020)
Austin Rovinski, Chun Zhao, Khalid Al-Hawaj, Paul Gao, Shaolin Xie, Christopher Torng, Scott Davidson, Aporva Amarnath, Luis Vega, Bandhav Veluri, Anuj Rao, Tutu Ajayi, Julian Puscar, Steve Dai, Ritchie Zhao, Dustin Richmond, Zhiru Zhang, Ian Galton, Christopher Batten, Michael B. Taylor, Ronald G. Dreslinski
A 1.4 GHz 695 Giga Risc-V Inst/s 496-Core Manycore Processor With Mesh On-Chip Network and an All-Digital Synthesized PLL in 16nm CMOS. VLSI Circuits (2019)
Ritchie Zhao, Yuwei Hu, Jordan Dotzel, Christopher De Sa, Zhiru Zhang
Building Efficient Deep Neural Networks With Unitary Group Convolutions. CVPR (2019)
Ritchie Zhao, Yuwei Hu, Jordan Dotzel, Christopher De Sa, Zhiru Zhang
Improving Neural Network Quantization without Retraining using Outlier Channel Splitting. CoRR (2019)
Ritchie Zhao, Yuwei Hu, Jordan Dotzel, Christopher De Sa, Zhiru Zhang
Improving Neural Network Quantization without Retraining using Outlier Channel Splitting. ICML (2019)
Ritchie Zhao, Christopher De Sa, Zhiru Zhang
Overwrite Quantization: Opportunistic Outlier Handling for Neural Network Accelerators. CoRR (2019)
Eric S. Chung, Jeremy Fowers, Kalin Ovtcharov, Michael Papamichael, Adrian M. Caulfield, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Maleen Abeydeera, Logan Adams, Hari Angepat, Christian Boehn, Derek Chiou, Oren Firestein, Alessandro Forin, Kang Su Gatlin, Mahdi Ghandi, Stephen Heil, Kyle Holohan, Ahmad El Husseini, Tamás Juhász, Kara Kagi, Ratna Kovvuri, Sitaram Lanka, Friedel van Megen, Dima Mukhortov, Prerak Patel, Brandon Perez, Amanda Rapsang, Steven K. Reinhardt, Bita Rouhani, Adam Sapek, Raja Seera, Sangeetha Shekar, Balaji Sridharan, Gabriel Weisz, Lisa Woods, Phillip Yi Xiao, Dan Zhang, Ritchie Zhao, Doug Burger
Serving DNNs in Real Time at Datacenter Scale with Project Brainwave. IEEE Micro 38 (2) (2018)
Ritchie Zhao, Yuwei Hu, Jordan Dotzel, Christopher De Sa, Zhiru Zhang
Building Efficient Deep Neural Networks with Unitary Group Convolutions. CoRR (2018)
Scott Davidson, Shaolin Xie, Christopher Torng, Khalid Al-Hawaj, Austin Rovinski, Tutu Ajayi, Luis Vega, Chun Zhao, Ritchie Zhao, Steve Dai, Aporva Amarnath, Bandhav Veluri, Paul Gao, Anuj Rao, Gai Liu, Rajesh K. Gupta, Zhiru Zhang, Ronald G. Dreslinski, Christopher Batten, Michael B. Taylor
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. IEEE Micro 38 (2) (2018)
Yuan Zhou, Udit Gupta, Steve Dai, Ritchie Zhao, Nitish Kumar Srivastava, Hanchen Jin, Joseph Featherston, Yi-Hsiang Lai, Gai Liu, Gustavo Angarita Velasquez, Wenping Wang, Zhiru Zhang
Rosetta: A Realistic High-Level Synthesis Benchmark Suite for Software Programmable FPGAs. FPGA (2018)
Steve Dai, Ritchie Zhao, Gai Liu, Shreesha Srinath, Udit Gupta, Christopher Batten, Zhiru Zhang
Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis. FPGA (2017)
Gai Liu, Mingxing Tan, Steve Dai, Ritchie Zhao, Zhiru Zhang
Architecture and Synthesis for Area-Efficient Pipelining of Irregular Loop Nests. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (11) (2017)
Ritchie Zhao, Weinan Song, Wentao Zhang, Tianwei Xing, Jeng-Hau Lin, Mani B. Srivastava, Rajesh Gupta, Zhiru Zhang
Accelerating Binarized Convolutional Neural Networks with Software-Programmable FPGAs. FPGA (2017)
Steve Dai, Gai Liu, Ritchie Zhao, Zhiru Zhang
Enabling adaptive loop pipelining in high-level synthesis. ACSSC (2017)
Jeng-Hau Lin, Tianwei Xing, Ritchie Zhao, Zhiru Zhang, Mani B. Srivastava, Zhuowen Tu, Rajesh K. Gupta
Binarized Convolutional Neural Networks with Separable Filters for Efficient Hardware Acceleration. CoRR (2017)
Jeng-Hau Lin, Tianwei Xing, Ritchie Zhao, Zhiru Zhang, Mani B. Srivastava, Zhuowen Tu, Rajesh K. Gupta
Binarized Convolutional Neural Networks with Separable Filters for Efficient Hardware Acceleration. CVPR Workshops (2017)
Chang Xu, Gai Liu, Ritchie Zhao, Stephen Yang, Guojie Luo, Zhiru Zhang
A Parallel Bandit-Based Approach for Autotuning FPGA Compilation. FPGA (2017)
Ritchie Zhao, Gai Liu, Shreesha Srinath, Christopher Batten, Zhiru Zhang
Improving high-level synthesis with decoupled data structure optimization. DAC (2016)
Mingxing Tan, Gai Liu, Ritchie Zhao, Steve Dai, Zhiru Zhang
ElasticFlow: A Complexity-Effective Approach for Pipelining Irregular Loop Nests. ICCAD (2015)
Ritchie Zhao, Mingxing Tan, Steve Dai, Zhiru Zhang
Area-efficient pipelining for FPGA-targeted high-level synthesis. DAC (2015)