On-Chip Test Clock Validation Using A Time-to-Digital Converter in FPGAs.

Yousuke Miyake Seiji Kajihara Poki Chen

Published in: ITC-Asia (2019)

Keyphrases

high speed
circuit design
data conversion
low cost
high voltage
phase locked loop
control method
control system
power consumption
high density
programmable logic
analog to digital converter
neural network
embedded systems
analog vlsi
ibm power processor