High-Precision PLL Delay Matrix With Overclocking and Double Data Rate for Accurate FPGA Time-to-Digital Converters.
Poki ChenJian-Ting LanRuei-Ting WangNguyen My QuiJohn Carl Joel S. MarquezSeiji KajiharaYousuke MiyakePublished in: IEEE Trans. Very Large Scale Integr. Syst. (2020)
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