Chen-Yi Lee

ORCID

Publication Activity (10 Years)

Years Active: 1990-2023
Publications (10 Years): 63

Top Venues

ISCAS

IEEE Trans. Circuits Syst. II Express Briefs

A-SSCC

VLSI-DAT

Publications

Hsi-Hao Huang, Chun-Hsien Liu, Tzu-Yun Huang, Sheng-Di Lin, Chen-Yi Lee
Self-Restoring and Low-Jitter Circuits for High Timing-Resolution SPAD Sensing Applications. ISCAS (2023)
Eugene Lee, Lien-Feng Hsu, Evan Chen, Chen-Yi Lee
Cross-Resolution Flow Propagation for Foveated Video Super-Resolution. WACV (2023)
Yun-Sheng Chan, Jiajie Diao, Chen-Yi Lee
A Pattern-Control Digital Microfluidic Bio-Chip for Fast Thermal Cycle in Nucleic Acid Amplification Tests. ISCAS (2023)
Tzu-Yun Huang, Hsi-Hao Huang, Chun-Hsien Liu, Sheng-Di Lin, Chen-Yi Lee
A Stack-Based In-Pixel Storage Circuit for SPAD Photon Counting. ISCAS (2023)
Lin-Hung Lai, Wen-Yue Lin, Yu-Wei Lu, Heng-Yu Lui, Shinsuke Yoshida, Shih-Hwa Chiou, Chen-Yi Lee
A 460 800 Pixels CMOS Capacitive Sensor Array With Programmable Fusion Pixels and Noise Canceling for Life Science Applications. IEEE Trans. Circuits Syst. II Express Briefs 70 (5) (2023)
Yun-Sheng Chan, Chen-Yi Lee
A Programmable Bio-Chip With Adaptive Pattern-Control Micro-Electrode-Dot-Array. IEEE Trans. Circuits Syst. II Express Briefs 69 (11) (2022)
Yi-Cheng Yu, Shang-Wen Chuang, Hong-Han Shuai, Chen-Yi Lee
Fast Adaption for Multi Motor Anomaly Detection via Meta Learning and deep unsupervised learning. ISIE (2022)
Yun-Sheng Chan, Ting-Ting Hsu, Yi-Po Chen, Hsu-Min Wu, Yun-Ming Wang, Chen-Yi Lee
A Traveling-Wave Dielectrophoresis Bio-Chip for Cell Manipulation in Standard CMOS Process. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Chen-Yi Lee
Bio-Chips for Fast Medial Tests Networks. VLSI-DAT (2022)
Eugene Lee, Lien-Feng Hsu, Evan Chen, Chen-Yi Lee
Cross-Resolution Flow Propagation for Foveated Video Super-Resolution. CoRR (2022)
Eugene Lee, Cheng-Han Huang, Chen-Yi Lee
Few-Shot and Continual Learning with Attentive Independent Mechanisms. ICCV (2021)
Eugene Lee, Cheng-Han Huang, Chen-Yi Lee
Few-Shot and Continual Learning with Attentive Independent Mechanisms. CoRR (2021)
Sheng Wan, Tung-Yu Wu, Heng-Wei Hsu, Wing Hung Wong, Chen-Yi Lee
Feature Consistency Training With JPEG Compressed Images. IEEE Trans. Circuits Syst. Video Technol. 30 (12) (2020)
Eugene Lee, Annie Ho, Yi-Ting Wang, Cheng-Han Huang, Chen-Yi Lee
Cross-Domain Adaptation for Biometric Identification Using Photoplethysmogram. ICASSP (2020)
Kuang-Yow Lian, Wei-Hsiu Hsu, Balram Deepak, Chen-Yi Lee
A Real-Time Wearable Assist System for Upper Extremity Throwing Action Based on Accelerometers. Sensors 20 (5) (2020)
Yi-Hui Wu, Yi-Huan Ou-Yang, Chiung-Chu Chen, Chen-Yi Lee, Chung-Yu Wu, Ming-Dou Ker
Miniaturized Intracerebral Potential Recorder for Long-Term Local Field Potential of Deep Brain Signals. EMBC (2020)
Eugene Lee, Evan Chen, Chen-Yi Lee
Meta-rPPG: Remote Heart Rate Estimation Using a Transductive Meta-learner. ECCV (27) (2020)
Kit Hwa Cheah, Humaira Nisar, Vooi Voon Yap, Chen-Yi Lee
Convolutional neural networks for classification of music-listening EEG: comparing 1D convolutional kernels with 2D kernels and cerebral laterality of musical influence. Neural Comput. Appl. 32 (13) (2020)
Eugene Lee, Chen-Yi Lee
NeuralScale: Efficient Scaling of Neurons for Resource-Constrained Deep Neural Networks. CVPR (2020)
Eugene Lee, Evan Chen, Chen-Yi Lee
Meta-rPPG: Remote Heart Rate Estimation Using a Transductive Meta-Learner. CoRR (2020)
Tung-Che Liang, Yun-Sheng Chan, Tsung-Yi Ho, Krishnendu Chakrabarty, Chen-Yi Lee
Multitarget Sample Preparation Using MEDA Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Hsiao-Chien Yang, Po-Heng Chen, Kuan-Wen Chen, Chen-Yi Lee, Yong-Sheng Chen
FADE: Feature Aggregation for Depth Estimation With Multi-View Stereo. IEEE Trans. Image Process. 29 (2020)
Wei Chiang, Hsie-Chia Chang, Chen-Yi Lee
An Area-Efficient High-Throughput SM4 Accelerator with SCA-Countermeasure for TV Applications. ISCAS (2020)
Eugene Lee, Chen-Yi Lee
NeuralScale: Efficient Scaling of Neurons for Resource-Constrained Deep Neural Networks. CoRR (2020)
Yun-Wen Lu, Antoon Purnal, Simon Vandenhende, Chen-Yi Lee, Ingrid Verbauwhede, Hsie-Chia Chang
A Lightweight 1.16 pJ/bit Processor for the Authenticated Encryption Scheme KetjeSR. VLSI-DAT (2019)
Tung-Che Liang, Yun-Sheng Chan, Tsung-Yi Ho, Krishnendu Chakrabarty, Chen-Yi Lee
Sample preparation for multiple-reactant bioassays on micro-electrode-dot-array biochips. ASP-DAC (2019)
Heng-Wei Hsu, Tung-Yu Wu, Sheng Wan, Wing Hung Wong, Chen-Yi Lee
QuatNet: Quaternion-Based Head Pose Estimation With Multiregression Loss. IEEE Trans. Multim. 21 (4) (2019)
Kit Hwa Cheah, Humaira Nisar, Vooi Voon Yap, Chen-Yi Lee
Short-time-span EEG-based personalized emotion recognition with deep convolutional neural network. ICSIPA (2019)
Zhanwei Zhong, Zipeng Li, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
Micro-Electrode-Dot-Array Digital Microfluidic Biochips: Technology, Design Automation, and Test Techniques. IEEE Trans. Biomed. Circuits Syst. 13 (2) (2019)
Yun-Sheng Chan, Kuan-Yu Lung, Yun-Ming Wang, Chen-Yi Lee
Joint Capacitive Sensing and Frequency Selection for Fast Medical Tests. ISCAS (2019)
Eugene Lee, Tsu-Jui Hsu, Chen-Yi Lee
Centralized State Sensing using Sensor Array on Wearable Device. ISCAS (2019)
Cheng-Hsiang Cheng, Ping-Yuan Tsai, Tzu-Yi Yang, Wan-Hsueh Cheng, Ting-Yang Yen, Zhicong Luo, Xin-Hong Qian, Zhi-Xin Chen, Tzu-Han Lin, Wei-Hong Chen, Wei-Ming Chen, Sheng-Fu Liang, Fu-Zen Shaw, Cheng-Siu Chang, Yue-Loong Hsin, Chen-Yi Lee, Ming-Dou Ker, Chung-Yu Wu
A Fully Integrated 16-Channel Closed-Loop Neural-Prosthetic CMOS SoC With Wireless Power and Bidirectional Data Telemetry for Real-Time Efficient Human Epileptic Seizure Control. IEEE J. Solid State Circuits 53 (11) (2018)
Heng-Wei Hsu, Tung-Yu Wu, Wing Hung Wong, Chen-Yi Lee
Correlation-Based Face Detection for Recognizing Faces in Videos. ICASSP (2018)
Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
Structural and Functional Test Methods for Micro-Electrode-Dot-Array Digital Microfluidic Biochips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (5) (2018)
Yi-Wei Chen, Tung-Yu Wu, Wing Hung Wong, Chen-Yi Lee
Diabetic Retinopathy Detection Based on Deep Convolutional Neural Networks. ICASSP (2018)
Zipeng Li, Kelvin Yi-Tse Lai, John McCrone, Po-Hsien Yu, Krishnendu Chakrabarty, Miroslav Pajic, Tsung-Yi Ho, Chen-Yi Lee
Efficient and Adaptive Error Recovery in a Micro-Electrode-Dot-Array Digital Microfluidic Biochip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (3) (2018)
Fang-Ju Ku, Tung-Yu Wu, Yen-Chin Liao, Hsie-Chia Chang, Wing Hung Wong, Chen-Yi Lee
A 1.86mJ/Gb/query bit-plane payload machine learning processor in 90nm CMOS. VLSI-DAT (2018)
Sheng Wan, Tung-Yu Wu, Wing H. Wong, Chen-Yi Lee
Confnet: Predict with Confidence. ICASSP (2018)
Zipeng Li, Kelvin Yi-Tse Lai, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
Sample Preparation on Micro-Electrode-Dot-Array Digital Microfluidic Biochips. ISVLSI (2017)
Chang-Hung Tsai, Wan-Ju Yu, Wing Hung Wong, Chen-Yi Lee
A 41.3/26.7 pJ per Neuron Weight RBM Processor Supporting On-Chip Learning/Inference for IoT Applications. IEEE J. Solid State Circuits 52 (10) (2017)
Szu-Chi Chung, Chun-Yuan Yu, Sung-Shine Lee, Hsie-Chia Chang, Chen-Yi Lee
An Improved DPA Countermeasure Based on Uniform Distribution Random Power Generator for IoT Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2017)
Chung-Yu Wu, Cheng-Hsiang Cheng, Yi-Huan Ou-Yang, Chiung-Ghu Chen, Wei-Ming Chen, Ming-Dou Ker, Chen-Yi Lee, Sheng-Fu Liang, Fu-Zen Shaw
Design considerations and clinical applications of closed-loop neural disorder control SoCs. ASP-DAC (2017)
Zipeng Li, Kelvin Yi-Tse Lai, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
Droplet Size-Aware and Error-Correcting Sample Preparation Using Micro-Electrode-Dot-Array Digital Microfluidic Biochips. IEEE Trans. Biomed. Circuits Syst. 11 (6) (2017)
Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
Droplet Size-Aware High-Level Synthesis for Micro-Electrode-Dot-Array Digital Microfluidic Biochips. IEEE Trans. Biomed. Circuits Syst. 11 (3) (2017)
Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Tsung-Yi Ho, Krishnendu Chakrabarty, Chen-Yi Lee
High-level synthesis for micro-electrode-dot-array digital microfluidic biochips. DAC (2016)
Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
Built-in self-test for micro-electrode-dot-array digital microfluidic biochips. ITC (2016)
Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Miroslav Pajic, Tsung-Yi Ho, Chen-Yi Lee
Error recovery in a micro-electrode-dot-array digital microfluidic biochip? ICCAD (2016)
Yingchieh Ho, Shu-Yu Hsu, Chen-Yi Lee
A Variation-Tolerant Subthreshold to Superthreshold Level Shifter for Heterogeneous Interfaces. IEEE Trans. Circuits Syst. II Express Briefs (2) (2016)
Yingchieh Ho, Gary Wang, Kelvin Yi-Tse Lai, Yi-Wen Lu, Keng-Ming Liu, Yun-Ming Wang, Chen-Yi Lee
Design of a micro-electrode cell for programmable lab-on-CMOS platform. ISCAS (2016)
Chia-Lung Lin, Rong-Jie Liu, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee
A 7.72 Gb/s LDPC-CC decoder with overlapped architecture for pre-5G wireless communications. A-SSCC (2016)
Chia-Lung Lin, Shu-Wen Tu, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee
An Efficient Decoder Architecture for Nonbinary LDPC Codes With Extended Min-Sum Algorithm. IEEE Trans. Circuits Syst. II Express Briefs (9) (2016)
Chang-Hung Tsai, Wan-Ju Yu, Wing Hung Wong, Chen-Yi Lee
A 41.3pJ/26.7pJ per neuron weight RBM processor for on-chip learning/inference applications. A-SSCC (2016)
Kin-Chu Ho, Chih-Lung Chen, Yen-Chin Liao, Hsie-Chia Chang, Chen-Yi Lee
A 3.46 Gb/s (9141, 8224) LDPC-based ECC scheme and on-line channel estimation for solid-state drive applications. ISCAS (2015)
Kelvin Yi-Tse Lai, Ming-Feng Shiu, Yi-Wen Lu, Yingchieh Ho, Yu-Chi Kao, Yu-Tao Yang, Gary Wang, Keng-Ming Liu, Hsie-Chia Chang, Chen-Yi Lee
A field-programmable lab-on-a-chip with built-in self-test circuit and low-power sensor-fusion solution in 0.35μm standard CMOS process. A-SSCC (2015)
Ping-Yuan Tsai, Yu-Yun Chang, Shu-Yu Hsu, Chen-Yi Lee
An OFDM-based 29.1Mbps 0.22nJ/bit body channel communication baseband transceiver. VLSI-DAT (2015)
Szu-Chi Chung, Jing-Yu Wu, Hsing-Ping Fu, Jen-Wei Lee, Hsie-Chia Chang, Chen-Yi Lee
Pairing Accelerator Over Characteristic Three. IEEE Trans. Very Large Scale Integr. Syst. 23 (1) (2015)
Xin-Ru Lee, Chih-Wen Yang, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee
An Area-Efficient Relaxed Half-Stochastic Decoding Architecture for Nonbinary LDPC Codes. IEEE Trans. Circuits Syst. II Express Briefs (3) (2015)
Xin-Ru Lee, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee
A 7.92 Gb/s 437.2 mW Stochastic LDPC Decoder Chip for IEEE 802.15.3c Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2015)
Kelvin Yi-Tse Lai, Yu-Tao Yang, Chen-Yi Lee
An Intelligent Digital Microfluidic Processor for Biomedical Detection. J. Signal Process. Syst. 78 (1) (2015)
Xin-Ru Lee, Chih-Wen Yang, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee
A 1.31Gb/s, 96.6% utilization stochastic nonbinary LDPC decoder for small cell applications. ESSCIRC (2015)
Chia-Lung Lin, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee
Jointly Designed Nonbinary LDPC Convolutional Codes and Memory-Based Decoder Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2015)
Chi-Heng Yang, Yi-Min Lin, Hsie-Chia Chang, Chen-Yi Lee
An MPCN-Based BCH Codec Architecture With Arbitrary Error Correcting Capability. IEEE Trans. Very Large Scale Integr. Syst. 23 (7) (2015)
Chang-Hung Tsai, Yu-Ting Chih, Wing Hung Wong, Chen-Yi Lee
A Hardware-Efficient Sigmoid Function With Adjustable Precision for a Neural Network System. IEEE Trans. Circuits Syst. II Express Briefs (11) (2015)
Chen-Yi Lee, Kelvin Yi-Tse Lai, Shu-Yu Hsu
Event-driven read-out circuits for energy-efficient sensor-SoC's. VLSI-DAT (2014)
Chih-Wen Yang, Xin-Ru Lee, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee
Area-efficient TFM-based stochastic decoder design for non-binary LDPC codes. ISCAS (2014)
Jen-Wei Lee, Szu-Chi Chung, Hsie-Chia Chang, Chen-Yi Lee
Efficient Power-Analysis-Resistant Dual-Field Elliptic Curve Cryptographic Processor Using Heterogeneous Dual-Processing-Element Architecture. IEEE Trans. Very Large Scale Integr. Syst. 22 (1) (2014)
Chang-Hung Tsai, Tung-Yu Wu, Shu-Yu Hsu, Chia-Ching Chu, Fang-Ju Ku, Ying-Siou Laio, Chih-Lung Chen, Wing Hung Wong, Hsie-Chia Chang, Chen-Yi Lee
MLP) for big data analysis and applications. VLSIC (2014)
Chih-Lung Chen, Sheng-Jhan Wu, Hsie-Chia Chang, Chen-Yi Lee
A 1-100Mb/s 0.5-9.9mW LDPC convolutional code decoder for body area network. A-SSCC (2014)
Kelvin Yi-Tse Lai, Yu-Tao Yang, Bang-Jing Chen, Chun-Jen Shen, Ming-Feng Shiu, Zih-Cheng He, Hsie-Chia Chang, Chen-Yi Lee
A 3.3V 15.6b 6.1pJ/0.02%RH with 10ms response humidity sensor for respiratory monitoring. A-SSCC (2014)
Shu-Yu Hsu, Yingchieh Ho, Po-Yao Chang, Chauchin Su, Chen-Yi Lee
A 48.6-to-105.2 µW Machine Learning Assisted Cardiac Sensor SoC for Mobile Healthcare Applications. IEEE J. Solid State Circuits 49 (4) (2014)
Chang-Hung Tsai, Hui-Hsuan Lee, Wan-Ju Yu, Chen-Yi Lee
A 2 GOPS quad-mean shift processor with early termination for machine learning applications. ISCAS (2014)
Yi-Min Lin, Chih-Hsiang Hsu, Hsie-Chia Chang, Chen-Yi Lee
A 2.56 Gb/s Soft RS (255, 239) Decoder Chip for Optical Communication Systems. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2014)
Tzi-Dar Chiueh, Toru Shimizu, Gregory Chen, Chen-Yi Lee, Charles Hsu, Tihao Chiang, Zhihua Wang, Junghwan Choi, Jongwoo Lee, Yasumoto Tomita, Takayuki Kawahara
What is a good way to expand a silicon value to a solution value? A-SSCC (2014)
Wen-Tsuen Chen, Youn-Long Lin, Chen-Yi Lee, Jeng-Long Chiang, Meng-Fan Chang, Shih-Chieh Chang
Strengthening Modern Electronics Industry Through the National Program for Intelligent Electronics in Taiwan. IEEE Access 1 (2013)
Kelvin Yi-Tse Lai, Yu-Tao Yang, Gary Wang, Yi-Wen Lu, Chen-Yi Lee
A digital microfluidic processor for biomedical applications. SiPS (2013)
Yi-Min Lin, Hsie-Chia Chang, Chen-Yi Lee
Improved High Code-Rate Soft BCH Decoder Architectures With One Extra Error Compensation. IEEE Trans. Very Large Scale Integr. Syst. 21 (11) (2013)
Jen-Wei Lee, Szu-Chi Chung, Hsie-Chia Chang, Chen-Yi Lee
Processor with side-channel attack resistance. ISSCC (2013)
Chien-Ying Yu, Ching-Che Chung, Chia-Jung Yu, Chen-Yi Lee
A Low-Power DCO Using Interlaced Hysteresis Delay Cells. IEEE Trans. Circuits Syst. II Express Briefs (10) (2012)
Po-Yao Chang, Shu-Yu Hsu, Chen-Yi Lee
A 4.88µW ECG delineator using wavelet transform for mobile healthcare application. BioCAS (2012)
Shu-Yu Hsu, Yingchieh Ho, Yuhwai Tseng, Ting-You Lin, Po-Yao Chang, Jen-Wei Lee, Ju-Hung Hsiao, Siou-Ming Chuang, Tze-Zheng Yang, Po-Chun Liu, Ten-Fang Yang, Ray-Jade Chen, Chauchin Su, Chen-Yi Lee
A sub-100µW multi-functional cardiac signal processor for mobile healthcare applications. VLSIC (2012)
Xin-Ru Lee, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee
Stochastic decoding for LDPC convolutional codes. ISCAS (2012)
Daisuke Yamaguchi, Takumi Yajima, Chen-Yi Lee, Hiromasa Shimada, Yuki Kinebuchi, Tatsuo Nakajima
Spatial Isolation on Realtime Hypervisor using Core-local Memory. PECCS (2012)
Yi-Huan Ou-Yang, Chien-Yu Kao, Jen-Yuan Hsu, Pangan Ting, Chen-Yi Lee
Extrinsic data compression method for double-binary turbo codes. ISCAS (2012)
Chia-Lin Liu, Chang-Hung Tsai, Hsiuan-Ting Wang, Yao Li, Chen-Yi Lee
A memory-efficient architecture for intra predictor and de-blocking filter in video coding system. APCCAS (2012)
Hsing-Ping Fu, Ju-Hung Hsiao, Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee
A low cost DPA-resistant 8-bit AES core based on ring oscillators. VLSI-DAT (2012)
Szu-Chi Chung, Jen-Wei Lee, Hsie-Chia Chang, Chen-Yi Lee
A high-performance elliptic curve cryptographic processor over GF(p) with SPA resistance. ISCAS (2012)
Jen-Wei Lee, Szu-Chi Chung, Hsie-Chia Chang, Chen-Yi Lee
An Efficient Countermeasure against Correlation Power-Analysis Attacks with Randomized Montgomery Operations for DF-ECC Processor. CHES (2012)
Chih-Lung Chen, Yu-Hsiang Lin, Hsie-Chia Chang, Chen-Yi Lee
A 2.37-Gb/s 284.8 mW Rate-Compatible (491, 3, 6) LDPC-CC Decoder. IEEE J. Solid State Circuits 47 (4) (2012)
Chien-Ying Yu, Jui-Yuan Yu, Chen-Yi Lee
A Low Voltage All-Digital On-Chip Oscillator Using Relative Reference Modeling. IEEE Trans. Very Large Scale Integr. Syst. 20 (9) (2012)
Shao-Wei Yen, Shiang-Yu Hung, Chih-Lung Chen, Hsie-Chia Chang, Shyh-Jye Jou, Chen-Yi Lee
A 5.79-Gb/s Energy-Efficient Multirate LDPC Codec Chip for IEEE 802.15.3c Applications. IEEE J. Solid State Circuits 47 (9) (2012)
Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee
A True Random-Based Differential Power Analysis Countermeasure Circuit for an AES Engine. IEEE Trans. Circuits Syst. II Express Briefs (2) (2012)
Jen-Wei Lee, Ju-Hung Hsiao, Hsie-Chia Chang, Chen-Yi Lee
An Efficient DPA Countermeasure With Randomized Montgomery Operations for DF-ECC Processor. IEEE Trans. Circuits Syst. II Express Briefs (5) (2012)
Chih-Hsiang Hsu, Yi-Min Lin, Hsie-Chia Chang, Chen-Yi Lee
A 2.56 Gb/s soft RS (255, 239) decoder chip for optical communication systems. ESSCIRC (2011)
Chien-Chen Lin, Yao Li, Chen-Yi Lee
A Predefined Bit-Plane Comparison Coding for Mobile Video Applications. IEEE Trans. Circuits Syst. II Express Briefs (7) (2011)
Yao-Lin Chen, Jen-Wei Lee, Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee
A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit. ISCAS (2011)
Ming-Yu Kuo, Yao Li, Chen-Yi Lee
An area-efficient high-accuracy prediction-based CABAC decoder architecture for H.264/AVC. ISCAS (2011)
Tsan-Wen Chen, Ping-Yuan Tsai, Jui-Yuan Yu, Chen-Yi Lee
A Sub-mW All-Digital Signal Component Separator With Branch Mismatch Compensation for OFDM LINC Transmitters. IEEE J. Solid State Circuits 46 (11) (2011)
Po-Chun Liu, Ju-Hung Hsiao, Hsie-Chia Chang, Chen-Yi Lee
A 2.97 Gb/s DPA-resistant AES engine with self-generated random sequence. ESSCIRC (2011)
Tsan-Wen Chen, Ping-Yuan Tsai, Dieter De Moitie, Jui-Yuan Yu, Chen-Yi Lee
A low power all-digital signal component separator for uneven multi-level LINC systems. ESSCIRC (2011)
Tsung-Han Lin, Yuki Kinebuchi, Hiromasa Shimada, Hitoshi Mitake, Chen-Yi Lee, Tatsuo Nakajima
Hardware-Assisted Reliability Enhancement for Embedded Multi-core Virtualization Design. RTCSA (2) (2011)

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Publication Activity (10 Years)

Top Topics

Top Venues

Chen-Yi Lee