Chi-Heng Yang

Publication Activity (10 Years)

Years Active: 2011-2023
Publications (10 Years): 3

Top Topics

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Benjamin M. Ampel, Chi-Heng Yang, James Lee Hu, Hsinchun Chen
Large Language Models for Conducting Advanced Text Analytics Information Systems Research. CoRR (2023)
Chi-Heng Yang, Ju-Chun Yen, Tawei David Wang
Human vs machine: Do customer service chatbots perform better? PACIS (2022)
Wei Lin, Yu-Cheng Hsu, Tsai-Hao Kuo, Yu-Siang Yang, Szu-Wei Chen, Chun-Wei Tsao, An-Chang Liu, Lih-Yuarn Ou, Tien-Ching Wang, Shao-Wei Yen, Yu-Hsiang Lin, Kuo-Hsin Lai, Chi-Heng Yang, Li-Chun Liang, Pei-Jung Hsu
3X endurance enhancement by advanced signal processor for 3D NAND flash memory. ITW (2017)
Chi-Heng Yang, Yi-Min Lin, Hsie-Chia Chang, Chen-Yi Lee
An MPCN-Based BCH Codec Architecture With Arbitrary Error Correcting Capability. IEEE Trans. Very Large Scale Integr. Syst. 23 (7) (2015)
Chi-Heng Yang, Yi-Hsun Chen, Hsie-Chia Chang
An area-efficient BCH codec with echelon scheduling for NAND flash applications. ICC (2013)
Yi-Hsun Chen, Chi-Heng Yang, Hsie-Chia Chang
A fully-parallel step-by-step BCH decoder over composite field for NOR flash memories. VLSI-DAT (2012)
Chia-Ching Chu, Yi-Min Lin, Chi-Heng Yang, Hsie-Chia Chang
A fully parallel BCH codec with double error correcting capability for NOR flash applications. ICASSP (2012)
Yi-Min Lin, Chi-Heng Yang, Chih-Hsiang Hsu, Hsie-Chia Chang, Chen-Yi Lee
A MPCN-Based Parallel Architecture in BCH Decoders for nand Flash Memory Devices. IEEE Trans. Circuits Syst. II Express Briefs (10) (2011)