Toru Shimizu

Publication Activity (10 Years)

Years Active: 1989-2023
Publications (10 Years): 23

Top Topics

Community Question Answering

Top Venues

Publications

Takahiro Yabe, Kota Tsubouchi, Toru Shimizu, Yoshihide Sekimoto, Kaoru Sezaki, Esteban Moro, Alex Pentland
Metropolitan Scale and Longitudinal Dataset of Anonymized Human Mobility Trajectories. CoRR (2023)
Toru Shimizu, Kota Tsubouchi, Takahiro Yabe
GEO-BLEU: similarity measure for geospatial sequences. SIGSPATIAL/GIS (2022)
Toru Shimizu, Kota Tsubouchi, Takahiro Yabe
GEO-BLEU: Similarity Measure for Geospatial Sequences. CoRR (2021)
Toru Shimizu, Takahiro Yabe, Kota Tsubouchi
Improving Land Use Classification using Human Mobility-based Hierarchical Place Embeddings. PerCom Workshops (2021)
Kota Tsubouchi, Hayato Kobayashi, Toru Shimizu
POI Atmosphere Categorization Using Web Search Session Behavior. SIGSPATIAL/GIS (2020)
Toru Shimizu, Takahiro Yabe, Kota Tsubouchi
Enabling Finer Grained Place Embeddings using Spatial Hierarchy from Human Mobility Trajectories. SIGSPATIAL/GIS (2020)
Takahiro Yabe, Kota Tsubouchi, Toru Shimizu, Yoshihide Sekimoto, Satish V. Ukkusuri
Unsupervised Translation via Hierarchical Anchoring: Functional Mapping of Places across Cities. KDD (2020)
Toru Shimizu, Takahiro Yabe, Kota Tsubouchi
Learning Fine Grained Place Embeddings with Spatial Hierarchy from Human Mobility Trajectories. CoRR (2020)
Takahiro Yabe, Kota Tsubouchi, Toru Shimizu, Yoshihide Sekimoto, Satish V. Ukkusuri
City2City: Translating Place Representations across Cities. CoRR (2019)
Takahiro Yabe, Kota Tsubouchi, Toru Shimizu, Yoshihide Sekimoto, Satish V. Ukkusuri
City2City: Translating Place Representations across Cities. SIGSPATIAL/GIS (2019)
Sosuke Kato, Toru Shimizu, Sumio Fujita, Tetsuya Sakai
Unsupervised Answer Retrieval with Data Fusion for Community Question Answering. AIRS (2019)
Takahiro Yabe, Kota Tsubouchi, Toru Shimizu, Yoshihide Sekimoto, Satish V. Ukkusuri
Predicting Evacuation Decisions using Representations of Individuals' Pre-Disaster Web Search Behavior. CoRR (2019)
Takahiro Yabe, Kota Tsubouchi, Toru Shimizu, Yoshihide Sekimoto, Satish V. Ukkusuri
Predicting Evacuation Decisions using Representations of Individuals' Pre-Disaster Web Search Behavior. KDD (2019)
Shusuke Yanagawa, Ryota Shimizu, Mototsugu Hamada, Toru Shimizu, Tadahiro Kuroda
Design Methodology in Wireless Power Transfer System for 3-D Stacked Multiple Receivers. ISCAS (2018)
Toru Shimizu, Nobuyuki Shimizu, Hayato Kobayashi
Pretraining Sentiment Classifiers with Unlabeled Dialog Data. ACL (2) (2018)
Shusuke Yanagawa, Ryota Shimizu, Mototsugu Hamada, Toru Shimizu, Tadahiro Kuroda
Optimization of Resonant Capacitance in Wireless Power Transfer System with 3-D Stacked Two Receivers. IEICE Trans. Electron. (7) (2018)
Takashi Nakada, Tomoki Hatanaka, Hiroshi Ueki, Masanori Hayashikoshi, Toru Shimizu, Hiroshi Nakamura
An Energy-Efficient Task Scheduling for Near-Realtime Systems with Execution Time Variation. IEICE Trans. Inf. Syst. (10) (2017)
Toru Shimizu
YJTI at the NTCIR-13 STC Japanese Subtask. NTCIR (2017)
Ryota Shimizu, Shusuke Yanagawa, Toru Shimizu, Mototsugu Hamada, Tadahiro Kuroda
Convolutional neural network for industrial egg classification. ISOCC (2017)
Shusuke Yanagawa, Ryota Shimizu, Mototsugu Hamada, Toru Shimizu, Tadahiro Kuroda
Wireless power transfer to stacked modules for IoT sensor nodes. ISOCC (2017)
Takashi Nakada, Tomoki Hatanaka, Hiroshi Nakamura, Hiroshi Ueki, Masanori Hayashikoshi, Toru Shimizu
An adaptive energy-efficient task scheduling under execution time variation based on statistical analysis. VLSI-SoC (2016)
Takashi Nakada, Hiroshi Nakamura, Toshifumi Nakamoto, Toru Shimizu
Normally-off power management for sensor nodes of global navigation satellite system. ISOCC (2016)
Ryota Shimizu, Shusuke Yanagawa, Yasutaka Monde, Hiroki Yamagishi, Mototsugu Hamada, Toru Shimizu, Tadahiro Kuroda
Deep learning application trial to lung cancer diagnosis for medical sensor systems. ISOCC (2016)
Takashi Nakada, Kazuya Okamoto, Toshiya Komoda, Shinobu Miwa, Yohei Sato, Hiroshi Ueki, Masanori Hayashikoshi, Toru Shimizu, Hiroshi Nakamura
Design Aid of Multi-core Embedded Systems with Energy Model. Inf. Media Technol. 9 (4) (2014)
Ryota Yasudo, Takahiro Kagami, Hideharu Amano, Yasunobu Nakase, Masashi Watanabe, Tsukasa Oishi, Toru Shimizu, Tadao Nakamura
Design of a low power NoC router using Marching Memory Through type. NOCS (2014)
Masanori Hayashikoshi, Yohei Sato, Hiroshi Ueki, Hiroyuki Kawai, Toru Shimizu
Normally-off MCU architecture for low-power sensor node. ASP-DAC (2014)
Takashi Nakada, Takuya Shigematsu, Toshiya Komoda, Shinobu Miwa, Hiroshi Nakamura, Yohei Sato, Hiroshi Ueki, Masanori Hayashikoshi, Toru Shimizu
Data-aware power management for periodic real-time systems with non-volatile memory. NVMSA (2014)
Ryota Yasudo, Takahiro Kagami, Hideharu Amano, Yasunobu Nakase, Masashi Watanabe, Tsukasa Oishi, Toru Shimizu, Tadao Nakamura
A low power NoC router using the marching memory through type. COOL Chips (2014)
Tzi-Dar Chiueh, Toru Shimizu, Gregory Chen, Chen-Yi Lee, Charles Hsu, Tihao Chiang, Zhihua Wang, Junghwan Choi, Jongwoo Lee, Yasumoto Tomita, Takayuki Kawahara
What is a good way to expand a silicon value to a solution value? A-SSCC (2014)
Yasunobu Nakase, Shinichi Hirose, Hiroshi Onoda, Yasuhiro Ido, Yoshiaki Shimizu, Tsukasa Oishi, Toshio Kumamoto, Toru Shimizu
On-Chip Feed-Forward Single-Inductor Dual-Output (SIDO) Boost DC-DC Converter for Battery and Solar Cell Operation Sensor Network Micro-Computer Integration. IEEE J. Solid State Circuits 48 (8) (2013)
Yasunobu Nakase, Yasuhiro Ido, Tsukasa Oishi, Toru Shimizu
On-Chip Single-Inductor Dual-Output DC-DC Boost Converter Having Off-Chip Power Transistor Drive and Micro-Computer Controlled MPPT Modes. IEICE Trans. Electron. (11) (2013)
Murray Shanahan, Verner P. Bingman, Toru Shimizu, Martin Wild, Onur Güntürkün
Large-scale network organization in the avian forebrain: a connectivity matrix and theoretical analysis. Frontiers Comput. Neurosci. 7 (2013)
Yasunobu Nakase, Shinichi Hirose, Hiroshi Onoda, Yasuhiro Ido, Yoshiaki Shimizu, Tsukasa Oishi, Toshio Kumamoto, Toru Shimizu
on-chip feed-forward single-inductor dual-output (SIDO) boost DC-DC converter for battery and solar cell operation sensor network micro-computer integration. CICC (2012)
Yasunobu Nakase, Shinichi Hirose, Toru Goda, Kehui Hu, Hiroshi Onoda, Yasuhiro Ido, Hiroyuki Kondo, Wei Kong, Wei Zhang, Tsukasa Oishi, Shintaro Mori, Toru Shimizu
0.8V start-up 92% efficiency on-chip boost DC-DC converters for battery operation micro-computers. A-SSCC (2011)
Toru Shimizu, Kazutami Arimoto, Osamu Nishii, Sugako Otani, Hiroyuki Kondo
Low Power Platform for Embedded Processor LSIs. IEICE Trans. Electron. (4) (2011)
Hiroyuki Kondo, Sugako Otani, Masami Nakajima, Osamu Yamamoto, Norio Masui, Naoto Okumura, Mamoru Sakugawa, Masaya Kitao, Koichi Ishimi, Masayuki Sato, Fumitaka Fukuzawa, Satoshi Imasu, Nobuhiro Kinoshita, Yusuke Ota, Kazutami Arimoto, Toru Shimizu
Heterogeneous Multicore SoC With SiP for Secure Multimedia Applications. IEEE J. Solid State Circuits 44 (8) (2009)
Hiroyuki Kondo, Masami Nakajima, Sugako Otani, Osamu Yamamoto, Norio Masui, Naoto Okumura, Mamoru Sakugawa, Masaya Kitao, Koichi Ishimi, Masayuki Sato, Fumitaka Fukuzawa, Kazuhiro Inaoka, Yoshihiro Saito, Kazutami Arimoto, Toru Shimizu
Heterogeneous multicore SoC for secure multimedia applications. CICC (2008)
Toru Shimizu, Ram Krishnamurthy
SE4 Automotive Signal Processing Technologies. ISSCC (2007)
Kazutami Arimoto, Toshihiro Hattori, Hidehiro Takata, Atsushi Hasegawa, Toru Shimizu
Continuous Design Efforts for Ubiquitous Network Era under the Physical Limitation of Advanced CMOS. IEICE Trans. Electron. (4) (2007)
Hideyuki Noda, Masami Nakajima, Katsumi Dosaka, Kiyoshi Nakata, Motoki Higashida, Osamu Yamamoto, Katsuya Mizumoto, Tetsushi Tanizaki, Takayuki Gyohten, Yoshihiro Okuno, Hiroyuki Kondo, Yukihiko Shimazu, Kazutami Arimoto, Kazunori Saito, Toru Shimizu
The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture. IEEE J. Solid State Circuits 42 (1) (2007)
Masami Nakajima, Hideyuki Noda, Katsumi Dosaka, Kiyoshi Nakata, Motoki Higashida, Osamu Yamamoto, Katsuya Mizumoto, Hiroyuki Kondo, Yukihiko Shimazu, Kazutami Arimoto, Kazunori Saitoh, Toru Shimizu
A 40GOPS 250mW massively parallel processor based on matrix architecture. ISSCC (2006)
Toru Shimizu, Masami Nakajima, Masahiro Kainaga
Design and Evaluation of a Massively Parallel Processor Based on Matrix Architecture. IEICE Trans. Electron. (11) (2006)
Toru Shimizu, Masakazu Ikezaki, Toyohide Watanabe, Taketoshi Ushiama
Spatial Relation for Geometrical / Topological Map Retrieval. KES (2) (2006)
Kunihiro Yamada, Takashi Furumura, Yasuhiro Seno, Yukihisa Naoe, Kenichi Kitazawa, Toru Shimizu, Koji Yoshida, Masanori Kojima, Hiroshi Mineno, Tadanori Mizuno
Home-Network of a Mutual Complement Communication System by Wired and Wireless. KES (3) (2006)
Hiroyuki Kondo, Masami Nakajima, Miroslaw Bober, Krzysztof Kucharski, Osamu Yamamoto, Toru Shimizu
Implementation of Face Recognition Processing Using an Embedded Processor. J. Robotics Mechatronics 17 (4) (2005)
Kunihiro Yamada, Takashi Furumura, Yoshio Inoue, Kenichi Kitazawa, Hiroki Takase, Yukihisa Naoe, Toru Shimizu, Yoshihiko Hirata, Hiroshi Mineno, Tadanori Mizuno
Dual Communication System Using Wired and Wireless with the Routing Consideration. KES (1) (2005)
Kunihiro Yamada, Kenichi Kitazawa, Hiroki Takase, Toshihiko Tamura, Yukihisa Naoe, Takashi Furumura, Toru Shimizu, Koji Yoshida, Masanori Kojima, Tadanori Mizuno
Dual Communication System Using Wired and Wireless Correspondence in Home Network. KES (1) (2005)
Kunihiro Yamada, Yoshihiko Hirata, Yukihisa Naoe, Takashi Furumura, Yoshio Inoue, Toru Shimizu, Koji Yoshida, Masanori Kojima, Tadanori Mizuno
Dual Communication System Using Wired and Wireless Correspondence in a Small Space. KES (2004)
Satoshi Kaneko, Hiroyuki Kondo, Norio Masui, Koichi Ishimi, Teruyuki Itou, Masayuki Satou, Naoto Okumura, Yukari Takata, Hirokazu Takata, Mamoru Sakugawa, Takashi Higuchi, Sugako Ohtani, Kei Sakamoto, Naoshi Ishikawa, Masami Nakajima, Shunichi Iwata, Kiyoshi Hayase, Satoshi Nakano, Sachiko Nakazawa, Kunihiro Yamada, Toru Shimizu
A 600-MHz single-chip multiprocessor with 4.8-GB/s internal shared pipelined bus and 512-kB internal memory. IEEE J. Solid State Circuits 39 (1) (2004)
Kunihiro Yamada, Masanori Kojima, Toru Shimizu, Fumiaki Sato, Tadanori Mizuno
A new RISC processor architecture for MPEG-2 decoding. IEEE Trans. Consumer Electron. 48 (1) (2002)
Yasuhiro Nunomura, Toru Shimizu, Kazunori Saitoh, Koji Tsuchihashi
Multimedia applications of microprocessor with embedded DRAM. ICASSP (1998)
Yasuhiro Nunomura, Toru Shimizu, Osamu Tomisawa
M32R/D-integrating DRAM and microprocessor. IEEE Micro 17 (6) (1997)
Toru Shimizu, Shunichi Iwata, Yuichi Saito, Toyohiko Yoshida, Masahito Matsuo, Junichi Hinata, Kazunori Saito
A 32-bit microprocessor with high performance bit-map manipulation instructions. ICCD (1989)