Login / Signup
Katsuya Mizumoto
Publication Activity (10 Years)
Years Active: 2006-2017
Publications (10 Years): 2
Top Topics
Metal Oxide Semiconductor
Image And Video Processing
Media Processing
High Definition
Top Venues
ISSCC
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
</>
Publications
</>
Seiji Mochizuki
,
Katsushige Matsubara
,
Keisuke Matsumoto
,
Chi Lan Phuong Nguyen
,
Tetsuya Shibayama
,
Kenichi Iwata
,
Katsuya Mizumoto
,
Takahiro Irita
,
Hirotaka Hara
,
Toshihiro Hattori
A 197mW 70ms-Latency Full-HD 12-Channel Video-Processing SoC in 16nm CMOS for In-Vehicle Information Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(12) (2017)
Seiji Mochizuki
,
Katsushige Matsubara
,
Keisuke Matsumoto
,
Chi Lan Phuong Nguyen
,
Tetsuya Shibayama
,
Kenichi Iwata
,
Katsuya Mizumoto
,
Takahiro Irita
,
Hirotaka Hara
,
Toshihiro Hattori
4.4 A 197mW 70ms-latency full-HD 12-channel video-processing SoC for car information systems.
ISSCC
(2016)
Hideyuki Noda
,
Tetsushi Tanizaki
,
Takayuki Gyohten
,
Katsumi Dosaka
,
Masami Nakajima
,
Katsuya Mizumoto
,
Kanako Yoshida
,
Takenobu Iwao
,
Tetsu Nishijima
,
Yoshihiro Okuno
,
Kazutami Arimoto
The Circuits and Robust Design Methodology of the Massively Parallel Processor Based on the Matrix Architecture.
IEEE J. Solid State Circuits
42 (4) (2007)
Hideyuki Noda
,
Masami Nakajima
,
Katsumi Dosaka
,
Kiyoshi Nakata
,
Motoki Higashida
,
Osamu Yamamoto
,
Katsuya Mizumoto
,
Tetsushi Tanizaki
,
Takayuki Gyohten
,
Yoshihiro Okuno
,
Hiroyuki Kondo
,
Yukihiko Shimazu
,
Kazutami Arimoto
,
Kazunori Saito
,
Toru Shimizu
The Design and Implementation of the Massively Parallel Processor Based on the Matrix Architecture.
IEEE J. Solid State Circuits
42 (1) (2007)
Masami Nakajima
,
Hideyuki Noda
,
Katsumi Dosaka
,
Kiyoshi Nakata
,
Motoki Higashida
,
Osamu Yamamoto
,
Katsuya Mizumoto
,
Hiroyuki Kondo
,
Yukihiko Shimazu
,
Kazutami Arimoto
,
Kazunori Saitoh
,
Toru Shimizu
A 40GOPS 250mW massively parallel processor based on matrix architecture.
ISSCC
(2006)