Design of a low power NoC router using Marching Memory Through type.
Ryota YasudoTakahiro KagamiHideharu AmanoYasunobu NakaseMasashi WatanabeTsukasa OishiToru ShimizuTadao NakamuraPublished in: NOCS (2014)
Keyphrases
- low power
- power dissipation
- network on chip
- power consumption
- single chip
- low power consumption
- cmos technology
- low cost
- high speed
- logic circuits
- vlsi architecture
- digital signal processing
- gate array
- vlsi circuits
- power reduction
- nm technology
- high power
- packet switched
- field programmable gate array
- end to end
- mixed signal
- signal processing
- image processing
- signal processor
- real time