Masanori Hayashikoshi

Publication Activity (10 Years)

Years Active: 1992-2020
Publications (10 Years): 9

Top Topics

Multicore Processors

Power Management

Automatic Registration

Top Venues

IEICE Trans. Inf. Syst.

Publications

Takashi Nakada, Hiroyuki Yanagihashi, Kunimaro Imai, Hiroshi Ueki, Takashi Tsuchiya, Masanori Hayashikoshi, Hiroshi Nakamura
An Energy-Efficient Task Scheduling for Near Real-Time Systems on Heterogeneous Multicore Processors. IEICE Trans. Inf. Syst. (2) (2020)
Masanori Hayashikoshi, Hiroaki Tanizaki, Yasumitsu Murai, Takaharu Tsuji, Kiyoshi Kawabata, Koji Nii, Hideyuki Noda, Hiroyuki Kondo, Yoshio Matsuda, Hideto Hidaka
A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications. IEICE Trans. Electron. (4) (2019)
Junichi Suzuki, Junichi Yamashita, Masami Hanyu, Masamichi Ido, Tatsuya Saito, Yasuhiro Nakashima, Masanori Hayashikoshi, Yukiyoshi Kiyota
A Cost-Effective High Accuracy Auto-Trimming System without Tester Constraint for Low-End Embedded Flash Memory. ISOCC (2018)
Masanori Hayashikoshi, Hideyuki Noda, Hiroyuki Kawai, Yasumitsu Murai, Sugako Otani, Koji Nii, Yoshio Matsuda, Hiroyuki Kondo
Low-Power Multi-Sensor System with Power Management and Nonvolatile Memory Access Control for IoT Applications. IEEE Trans. Multi Scale Comput. Syst. 4 (4) (2018)
Masanori Hayashikoshi, Hideyuki Noda, Hiroyuki Kawai, Koji Nii, Hiroyuki Kondo
Low-power multi-sensor system with task scheduling and autonomous standby mode transition control for IoT applications. COOL Chips (2017)
Takashi Nakada, Tomoki Hatanaka, Hiroshi Ueki, Masanori Hayashikoshi, Toru Shimizu, Hiroshi Nakamura
An Energy-Efficient Task Scheduling for Near-Realtime Systems with Execution Time Variation. IEICE Trans. Inf. Syst. (10) (2017)
Takashi Nakada, Hiroyuki Yanagihashi, Hiroshi Nakamura, Kunimaro Imai, Hiroshi Ueki, Takashi Tsuchiya, Masanori Hayashikoshi
Energy-aware task scheduling for near real-time periodic tasks on heterogeneous multicore processors. VLSI-SoC (2017)
Takashi Nakada, Tomoki Hatanaka, Hiroshi Nakamura, Hiroshi Ueki, Masanori Hayashikoshi, Toru Shimizu
An adaptive energy-efficient task scheduling under execution time variation based on statistical analysis. VLSI-SoC (2016)
Masanori Hayashikoshi, Hideyuki Noda, Hiroyuki Kawai, Hiroyuki Kondo
Low-power multi-sensor system with normally-off sensing technology for IoT applications. ISOCC (2016)
Takashi Nakada, Hiroyuki Yanagihashi, Hiroshi Ueki, Takashi Tsuchiya, Masanori Hayashikoshi, Hiroshi Nakamura
Energy-Efficient Continuous Task Scheduling for Near Real-Time Periodic Tasks. DSDIS (2015)
Takashi Nakada, Kazuya Okamoto, Toshiya Komoda, Shinobu Miwa, Yohei Sato, Hiroshi Ueki, Masanori Hayashikoshi, Toru Shimizu, Hiroshi Nakamura
Design Aid of Multi-core Embedded Systems with Energy Model. Inf. Media Technol. 9 (4) (2014)
Masanori Hayashikoshi, Yohei Sato, Hiroshi Ueki, Hiroyuki Kawai, Toru Shimizu
Normally-off MCU architecture for low-power sensor node. ASP-DAC (2014)
Takashi Nakada, Takuya Shigematsu, Toshiya Komoda, Shinobu Miwa, Hiroshi Nakamura, Yohei Sato, Hiroshi Ueki, Masanori Hayashikoshi, Toru Shimizu
Data-aware power management for periodic real-time systems with non-volatile memory. NVMSA (2014)
Masaki Tsukude, Kazutami Arimoto, Hideto Hidaka, Yasuhiro Konishi, Masanori Hayashikoshi, Katsuhiro Suma, Kazuyasu Fujishima
Highly Reliable Testing of ULSI Memories with On-Chip Voltage-Down Converters. IEEE Des. Test Comput. 10 (2) (1993)
Masaki Tsukude, Kazutami Arimoto, Hideto Hidaka, Yasuhiro Konishi, Masanori Hayashikoshi, Katsunori Suma, Kazuyasu Fujishima
A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter. ITC (1992)