Yasumitsu Murai

Publication Activity (10 Years)

Years Active: 2018-2022
Publications (10 Years): 3

Top Topics

Parallel Architecture

Power Dissipation

Top Venues

IEEE Trans. Multi Scale Comput. Syst.

IEEE J. Solid State Circuits

IEICE Trans. Electron.

Publications

Masaya Nakano, Yoshinobu Kaneda, Satoru Nakanishi, Yasumitsu Murai, Yosuke Tashiro, Yasuhiko Taito, Tomoya Ogawa, Hidenori Mitani, Takashi Ito, Takashi Kono
Density With Charge-Assisted Offset Cancellation Sense Amplifier. IEEE J. Solid State Circuits 57 (10) (2022)
Masanori Hayashikoshi, Hiroaki Tanizaki, Yasumitsu Murai, Takaharu Tsuji, Kiyoshi Kawabata, Koji Nii, Hideyuki Noda, Hiroyuki Kondo, Yoshio Matsuda, Hideto Hidaka
A Cost-Effective 1T-4MTJ Embedded MRAM Architecture with Voltage Offset Self-Reference Sensing Scheme for IoT Applications. IEICE Trans. Electron. (4) (2019)
Masanori Hayashikoshi, Hideyuki Noda, Hiroyuki Kawai, Yasumitsu Murai, Sugako Otani, Koji Nii, Yoshio Matsuda, Hiroyuki Kondo
Low-Power Multi-Sensor System with Power Management and Nonvolatile Memory Access Control for IoT Applications. IEEE Trans. Multi Scale Comput. Syst. 4 (4) (2018)