A Testing Technique for ULSI Memory with On-Chip Voltage Down Converter.
Masaki TsukudeKazutami ArimotoHideto HidakaYasuhiro KonishiMasanori HayashikoshiKatsunori SumaKazuyasu FujishimaPublished in: ITC (1992)
Keyphrases
- low voltage
- random access memory
- high voltage
- single phase
- cmos technology
- high speed
- design considerations
- low cost
- analog to digital converter
- memory subsystem
- memory access
- pulse width modulation
- embedded dram
- memory requirements
- mixed signal
- power system
- test cases
- power supply
- single chip
- power dissipation
- multithreading
- digital signal processors
- operating conditions
- output voltage
- main memory
- neural network
- level parallelism
- input output
- low power
- power management
- high density
- transmission line