Mamoru Sakugawa

Publication Activity (10 Years)

Years Active: 2004-2011
Publications (10 Years): 0

Publications

Masanori Kurimoto, Yasuhiko Takahashi, Yuji Fujiwara, Mamoru Sakugawa, Souichi Kobayashi, Hiroyuki Kondo
System performance and energy consumption improvement methodology by delay adjustable synchronizer. A-SSCC (2011)
Hiroyuki Kondo, Sugako Otani, Masami Nakajima, Osamu Yamamoto, Norio Masui, Naoto Okumura, Mamoru Sakugawa, Masaya Kitao, Koichi Ishimi, Masayuki Sato, Fumitaka Fukuzawa, Satoshi Imasu, Nobuhiro Kinoshita, Yusuke Ota, Kazutami Arimoto, Toru Shimizu
Heterogeneous Multicore SoC With SiP for Secure Multimedia Applications. IEEE J. Solid State Circuits 44 (8) (2009)
Hiroyuki Kondo, Masami Nakajima, Sugako Otani, Osamu Yamamoto, Norio Masui, Naoto Okumura, Mamoru Sakugawa, Masaya Kitao, Koichi Ishimi, Masayuki Sato, Fumitaka Fukuzawa, Kazuhiro Inaoka, Yoshihiro Saito, Kazutami Arimoto, Toru Shimizu
Heterogeneous multicore SoC for secure multimedia applications. CICC (2008)
Hiroyuki Kondo, Masami Nakajima, Norio Masui, Sugako Otani, Naoto Okumura, Yukari Takata, Takashi Nasu, Hirokazu Takata, Takashi Higuchi, Mamoru Sakugawa, Hayato Fujiwara, Kazuya Ishida, Koichi Ishimi, Satoshi Kaneko, Teruyuki Itoh, Masayuki Sato, Osamu Yamamoto, Kazutami Arimoto
Design and Implementation of a Configurable Heterogeneous Multicore SoC With Nine CPUs and Two Matrix Processors. IEEE J. Solid State Circuits 43 (4) (2008)
Hitoshi Kubota, Kazumasa Suzuki, Isamu Kawakimi, Mamoru Sakugawa, Hiroyuki Kondo
High frequency band dispersed-tone power line communication modem for networked appliances. IEEE Trans. Consumer Electron. 52 (1) (2006)
Satoshi Kaneko, Hiroyuki Kondo, Norio Masui, Koichi Ishimi, Teruyuki Itou, Masayuki Satou, Naoto Okumura, Yukari Takata, Hirokazu Takata, Mamoru Sakugawa, Takashi Higuchi, Sugako Ohtani, Kei Sakamoto, Naoshi Ishikawa, Masami Nakajima, Shunichi Iwata, Kiyoshi Hayase, Satoshi Nakano, Sachiko Nakazawa, Kunihiro Yamada, Toru Shimizu
A 600-MHz single-chip multiprocessor with 4.8-GB/s internal shared pipelined bus and 512-kB internal memory. IEEE J. Solid State Circuits 39 (1) (2004)