Masanori Kurimoto

Publication Activity (10 Years)

Years Active: 2008-2012
Publications (10 Years): 0

Top Topics

Design Methodology

Ultra Low Power

Vlsi Architecture

Top Venues

ACM Trans. Design Autom. Electr. Syst.

Publications

Masanori Kurimoto, Takeshi Yamamoto, Satoshi Nakano, Atsuto Hanami, Hiroyuki Kondo
Verification work reduction methodology in low-power chip implementation. ACM Trans. Design Autom. Electr. Syst. 18 (1) (2012)
Masanori Kurimoto, Jun Matsushima, Shigeki Ohbayashi, Yoshiaki Fukui, Michio Komoda, Nobuhiro Tsuda
A Yield and Reliability Improvement Methodology Based on Logic Redundant Repair with a Repairable Scan Flip-Flop Designed by Push Rule. ACM Trans. Design Autom. Electr. Syst. 17 (2) (2012)
Masanori Kurimoto, Yasuhiko Takahashi, Yuji Fujiwara, Mamoru Sakugawa, Souichi Kobayashi, Hiroyuki Kondo
System performance and energy consumption improvement methodology by delay adjustable synchronizer. A-SSCC (2011)
Masanori Kurimoto, Jun Matsushima, Shigeki Ohbayashi, Yoshiaki Fukui
A yield improvement methodology based on logic redundant repair with a repairable scan flip-flop designed by push rule. ISQED (2010)
Masanori Kurimoto, Hiroaki Suzuki, Rei Akiyama, Tadao Yamanaka, Haruyuki Ohkuma, Hidehiro Takata, Hirofumi Shinohara
Phase-adjustable error detection flip-flops with 2-stage hold-driven optimization, slack-based grouping scheme and slack distribution control for dynamic voltage scaling. ACM Trans. Design Autom. Electr. Syst. 15 (2) (2010)
Mitsuya Fukazawa, Masanori Kurimoto, Rei Akiyama, Hidehiro Takata, Makoto Nagata
Experimental Evaluation of Dynamic Power Supply Noise and Logical Failures in Microprocessor Operations. IEICE Trans. Electron. (4) (2009)
Masanori Kurimoto, Hiroaki Suzuki, Rei Akiyama, Tadao Yamanaka, Haruyuki Ohkuma, Hidehiro Takata, Hirofumi Shinohara
Phase-adjustable error detection flip-flops with 2-stage hold driven optimization and slack based grouping scheme for dynamic voltage scaling. DAC (2008)
Hiroaki Suzuki, Masanori Kurimoto, Tadao Yamanaka, Hidehiro Takata, Hiroshi Makino, Hirofumi Shinohara
Post-silicon programmed body-biasing platform suppressing device variability in 45 nm CMOS technology. ISLPED (2008)