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Efficient synthesis of approximate threshold logic circuits with an error rate guarantee.
Yung-An Lai
Chia-Chun Lin
Chia-Cheng Wu
Yung-Chih Chen
Chun-Yao Wang
Published in:
DATE (2018)
Keyphrases
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error rate
logic circuits
test set
functional decomposition
image processing
word error rate
lower error rates
logic synthesis
false discovery rate
text entry
equal error rate
rejection rate