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Verification of Reconfigurable Binary Decision Diagram-Based Single-Electron Transistor Arrays.

Yung-Chih ChenChun-Yao WangChing-Yi Huang
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2013)
Keyphrases
  • binary decision diagrams
  • high speed
  • model checking
  • model checker
  • formal methods
  • formal verification
  • low cost
  • constraint satisfaction
  • pseudo boolean constraints