Throughput oriented FPGA overlays using DSP blocks.
Abhishek Kumar JainDouglas L. MaskellSuhaib A. FahmyPublished in: DATE (2016)
Keyphrases
- verilog hdl
- digital signal processing
- signal processing
- systolic array
- real time image processing
- high speed
- digital signal
- response time
- digital signal processors
- digital signal processor
- field programmable gate array
- low power
- hardware implementation
- low power consumption
- hardware design
- early vision
- overlay network
- data flow
- low cost
- image processing
- real time
- parallel architecture
- allocation scheme
- scalable distributed
- power consumption
- fractal image coding
- channel capacity
- data acquisition
- hardware architectures
- digital images