A dependency graph based methodology for parallelizing HLL applications on FPGA (abstract only).

Sunita Chandrasekaran Shilpa Shanbagh Douglas L. Maskell

Published in: FPGA (2010)

Keyphrases

high speed
hardware implementation
low cost
parallel processing
database
real time
signal processing
parallel implementation
field programmable gate array
data sets
high level
data acquisition
graph model
hardware design
software implementation