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Adapting the DySER Architecture with DSP Blocks as an Overlay for the Xilinx Zynq.
Abhishek Kumar Jain
Xiangwei Li
Suhaib A. Fahmy
Douglas L. Maskell
Published in:
SIGARCH Comput. Archit. News (2015)
Keyphrases
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high speed
hardware architecture
hardware implementation
signal processing
fpga implementation
pipelined architecture
software architecture
distributed architecture
real time
network architecture
data flow
overlay network
management system
video sequences
neural network
fpga device
systolic array
data sets