Dirk Koch

ORCID

Publication Activity (10 Years)

Years Active: 2003-2024
Publications (10 Years): 56

Top Venues

FPL

FPT

FCCM

ACM Trans. Reconfigurable Technol. Syst.

University of Erlangen-Nuremberg (PHD)

Education History

University of Erlangen-Nuremberg

PHD

Publications

Bardia Babaei, Dirk Koch
Analysis of Process Variation Within Clock Regions of AMD-Xilinx UltraScale+ Devices. ARC (2024)
Myrtle Shah, Jakob Ternes, Dirk Koch
FABulous Demo: Open Source FPGA on Sky130. FPL (2023)
Shaden M. Alismail, Dirk Koch
Memory-Aware Scheduling for a Resource-Elastic FPGA Operating System. ARC (2023)
Shaden M. Alismail, Dirk Koch
Efficient Resource Scheduling for Runtime Reconfigurable Systems on FPGAs. FPL (2023)
King Lok Chung, Nguyen Dao, Jing Yu, Dirk Koch
How to Shrink My FPGAs - Optimizing Tile Interfaces and the Configuration Logic in FABulous FPGA Fabrics. FPGA (2022)
Kaspar Mätas, Kristiyan Manev, Joseph Powell, Dirk Koch
Automated Generation and Orchestration of Stream Processing Pipelines on FPGAs. FPT (2022)
Christophe Bobda, Joel Mandebi Mbongue, Paul Chow, Mohammad Ewais, Naif Tarafdar, Juan Camilo Vega, Ken Eguro, Dirk Koch, Suranga Handagala, Miriam Leeser, Martin C. Herbordt, Hafsah Shahzad, Peter Hofste, Burkhard Ringlein, Jakub Szefer, Ahmed Sanaullah, Russell Tessier
The Future of FPGA Acceleration in Datacenters and the Cloud. ACM Trans. Reconfigurable Technol. Syst. 15 (3) (2022)
Bardia Babaei, Dirk Koch
Tunable Fine-grained Clock Phase-shifting for FPGAs. FPL (2022)
Kristiyan Manev, Joseph Powell, Kaspar Matas, Dirk Koch
byteman: A Bitstream Manipulation Framework. FPT (2022)
Bardia Babaei, Dirk Koch
Precise Characterizing of FPGAs in Production Systems. FPL (2022)
Joseph Powell, Kaspar Matas, Kristiyan Manev, Dirk Koch
FPL Demo: FPGA Bitstream Virus Scanning. FPL (2022)
Kaspar Mätas, Kristiyan Manev, Joseph Powell, Dirk Koch
FPL Demo: Runtime Stream Processing with Resource-Elastic Pipelines on FPGAs. FPL (2022)
Nguyen Cong Dao, Dirk Koch
Memristor-Based Pass Gate for FPGA Programmable Routing Switch. ISCAS (2021)
Frank Hannig, Dirk Koch
Introduction to the Special Issue on Application-Specific Systems, Architectures and Processors. J. Signal Process. Syst. 93 (12) (2021)
Jing Yu, Andrew Attwood, Nguyen Dao, Dirk Koch
The FABulous Open eFPGA Ecosystem in Action - From Specifications to Chips to Running Bitsteams. FPL (2021)
Tuan La, Khoa Dang Pham, Joseph Powell, Dirk Koch
Denial-of-Service on FPGA-based Cloud Infrastructures - Attack and Defense. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2021 (3) (2021)
Nguyen Cong Dao, Dirk Koch
Memristor-based Pass Gate Targeting FPGA Look-Up Table. ICEIC (2021)
Shaza Zeitouni, Jo Vliegen, Tommaso Frassetto, Dirk Koch, Ahmad-Reza Sadeghi, Nele Mentens
Trusted Configuration in Cloud FPGAs. FCCM (2021)
Dirk Koch, Nguyen Dao, Bea Healy, Jing Yu, Andrew Attwood
FABulous: An Embedded FPGA Framework. FPGA (2021)
Kristiyan Manev, Dirk Koch
Resource Elastic Database Acceleration. FPL (2020)
Nguyen Dao, Andrew Attwood, Bea Healy, Dirk Koch
FlexBex: A RISC-V with a Reconfigurable Instruction Extension. FPT (2020)
Khoa Dang Pham, Dirk Koch, Anuj Vaishnav, Konstantinos Georgopoulos, Pavlos Malakonakis, Aggelos Ioannou, Iakovos Mavroidis
Moving Compute towards Data in Heterogeneous multi-FPGA Clusters using Partial Reconfiguration and I/O Virtualisation. FPT (2020)
Dirk Koch, Frank Hannig, Javier Navaridas
Message from the Conference Chairs - ASAP 2020. ASAP (2020)
Tuan La, Kaspar Matas, Khoa Dang Pham, Dirk Koch
Securing FPGA Accelerators at the Electrical Level for Multi-tenant Platforms. FPL (2020)
Tuan Minh La, Kaspar Matas, Nikola Grunchevski, Khoa Dang Pham, Dirk Koch
FPGADefender: Malicious Self-oscillator Scanning for Xilinx UltraScale + FPGAs. ACM Trans. Reconfigurable Technol. Syst. 13 (3) (2020)
Khoa Dang Pham, Anuj Vaishnav, Joseph Powell, Dirk Koch
A Self-Compilation Flow Demo on FOS - The FPGA Operating System. FPL (2020)
Kaspar Mätas, Dirk Koch
Transparent Integration of a Dynamic FPGA Database Acceleration System. FPL (2020)
Tuan La, Kaspar Matas, Joseph Powell, Khoa Dang Pham, Dirk Koch
Demo: A Closer Look at Malicious Bitstreams. FPL (2020)
Charalampos Kritikakis, Dirk Koch
Enabling Dynamic System Integration on Maxeler HLS Platforms. J. Signal Process. Syst. 92 (9) (2020)
Anuj Vaishnav, Khoa Dang Pham, Joseph Powell, Dirk Koch
FOS: A Modular FPGA Operating System for Dynamic Workloads. ACM Trans. Reconfigurable Technol. Syst. 13 (4) (2020)
Anuj Vaishnav, Khoa Dang Pham, Joseph Powell, Dirk Koch
FOS: A Modular FPGA Operating System for Dynamic Workloads. CoRR (2020)
Kaspar Matas, Tuan Minh La, Khoa Dang Pham, Dirk Koch
Power-hammering through Glitch Amplification - Attacks and Mitigation. FCCM (2020)
Kaspar Matas, Tuan La, Nikola Grunchevski, Khoa Dang Pham, Dirk Koch
Invited Tutorial: FPGA Hardware Security for Datacenters and Beyond. FPGA (2020)
Anuj Vaishnav, Khoa Dang Pham, Dirk Koch
Heterogeneous Resource-Elastic Scheduling for CPU+FPGA Architectures. HEART (2019)
Charalampos Kritikakis, Dirk Koch
End-to-end Dynamic Stream Processing on Maxeler HLS Platforms. ASAP (2019)
Kristiyan Manev, Anuj Vaishnav, Dirk Koch
Unexpected Diversity: Quantitative Memory Analysis for Zynq UltraScale+ Systems. FPT (2019)
Khoa Dang Pham, Malte Vesper, Dirk Koch, Eddie Hung
EFCAD - An Embedded FPGA CAD Tool Flow for Enabling On-chip Self-Compilation. FCCM (2019)
Anuj Vaishnav, Khoa Dang Pham, Kristiyan Manev, Dirk Koch
The FOS (FPGA Operating System) Demo. FPL (2019)
Kristiyan Manev, Anuj Vaishnav, Charalampos Kritikakis, Dirk Koch
Scalable Filtering Modules for Database Acceleration on FPGAs. HEART (2019)
Jose Raul Garcia Ordaz, Dirk Koch
A Soft Dual-Processor System with a Partially Run-Time Reconfigurable Shared 128-Bit SIMD Engine. ASAP (2018)
Anuj Vaishnav, Khoa Dang Pham, Dirk Koch
A Survey on FPGA Virtualization. FPL (2018)
Anuj Vaishnav, Khoa Dang Pham, Dirk Koch, James Garside
Resource Elastic Virtualization for FPGAs Using OpenCL. FPL (2018)
Khoa Dang Pham, Edson L. Horta, Dirk Koch, Anuj Vaishnav, Thomas Kuhn
IPRDF: An Isolated Partial Reconfiguration Design Flow for Xilinx FPGAs. MCSoC (2018)
Nicolae Bogdan Grigore, Charalampos Kritikakis, Dirk Koch
HLS Enabled Partially Reconfigurable Module Implementation. ARCS (2018)
Anuj Vaishnav, Khoa Dang Pham, Dirk Koch
Live Migration for OpenCL FPGA Accelerators. FPT (2018)
Kristiyan Manev, Dirk Koch
Large Utility Sorting on FPGAs. FPT (2018)
Jose Raul Garcia Ordaz, Dirk Koch
HLS Compilation for CPU Interlays. HEART (2017)
Khoa Dang Pham, Edson L. Horta, Dirk Koch
BITMAN: A tool and API for FPGA bitstream manipulations. DATE (2017)
Anuj Vaishnav, Jose Raul Garcia Ordaz, Dirk Koch
A security library for FPGA interlays. FPL (2017)
Jose Raul Garcia Ordaz, Dirk Koch
Making a case for an ARM Cortex-A9 CPU interlay replacing the NEON SIMD unit. FPL (2017)
Gengting Liu, Jim D. Garside, Steve B. Furber, Luis A. Plana, Dirk Koch
Asynchronous interface FIFO design on FPGA for high-throughput NRZ synchronisation. FPL (2017)
Zhenzhong Xiao, Dirk Koch, Mikel Luján
A partial reconfiguration controller for Altera Stratix V FPGAs. FPL (2016)
Wei Song, Dirk Koch, Mikel Luján, Jim D. Garside
Parallel Hardware Merge Sorter. FCCM (2016)
Jose Raul Garcia Ordaz, Dirk Koch
soft-NEON: A study on replacing the NEON engine of an ARM SoC with a reconfigurable fabric. ASAP (2016)
Iakovos Mavroidis, Ioannis Papaefstathiou, Luciano Lavagno, Dimitrios S. Nikolopoulos, Dirk Koch, John Goodacre, Ioannis Sourdis, Vassilis Papaefstathiou, Marcello Coppola, Manuel Palomino
ECOSCALE: Reconfigurable computing and runtime system for future exascale systems. DATE (2016)
Malte Vesper, Dirk Koch, Kizheppatt Vipin, Suhaib A. Fahmy
JetStream: An open-source high-performance PCI Express 3 streaming library for FPGA-to-Host and FPGA-to-FPGA communication. FPL (2016)
Michael Xi Yue, Dirk Koch, Guy G. F. Lemieux
Rapid Overlay Builder for Xilinx FPGAs. FCCM (2015)
Jo Vliegen, Nele Mentens, Dirk Koch, Dries Schellekens, Ingrid Verbauwhede
Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs. J. Cryptogr. Eng. 5 (2) (2015)
Frank Hannig, Dirk Koch, Daniel Ziener
Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015). CoRR (2015)
Nicolae Bogdan Grigore, Dirk Koch
Placing partially reconfigurable stream processing applications on FPGAs. FPL (2015)
Frank Hannig, Dirk Koch, Daniel Ziener
Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014). CoRR (2014)
Christian Beckhoff, Dirk Koch, Jim Tørresen
Design Tools for Implementing Self-Aware and Fault-Tolerant Systems on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 7 (2) (2014)
Christian Beckhoff, Dirk Koch, Jim Tørresen
Portable module relocation and bitstream compression for Xilinx FPGAs. FPL (2014)
Dirk Koch, Christian Beckhoff
Hierarchical reconfiguration of FPGAs. FPL (2014)
Alexander Wold, Dirk Koch, Jim Tørresen
Component based design using constraint programming for module placement on FPGAs. ReCoSoC (2013)
Christian Beckhoff, Dirk Koch, Jim Tørresen
Automatic Floorplanning and Interface Synthesis of Island Style Reconfigurable Systems with GoAhead. ARCS (2013)
Alexander Wold, Dirk Koch, Jim Tørresen
Thermal Aware Module Placement for Heterogeneous 3D-IC Based FPGAs. IPDPS Workshops (2013)
Dirk Koch, Christian Beckhoff, Guy G. F. Lemieux
An efficient FPGA overlay for portable custom instruction set extensions. FPL (2013)
Simen Gimle Hansen, Dirk Koch, Jim Tørresen
Simulation framework for cycle-accurate RTL modeling of partial run-time reconfiguration in VHDL. ReCoSoC (2013)
Christian Beckhoff, Alexander Wold, Anders Fritzell, Dirk Koch, Jim Tørresen
Building partial systems with GoAhead. FPL (2013)
Dirk Koch, Christian Beckhoff, Alexander Wold, Jim Tørresen
EasyPR - An easy usable open-source PR system. FPT (2013)
Jochen Vandorpe, Jo Vliegen, Ruben Smeets, Nele Mentens, Milos Drutarovský, Michal Varchola, Kerstin Lemke-Rust, P. Ploger, Peter Samarin, Dirk Koch, Yngve Hafting, Jim Tørresen
Remote FPGA design through eDiViDe - European Digital Virtual Design Lab. FPL (2013)
Christian Beckhoff, Dirk Koch, Jim Tørresen
Go Ahead: A Partial Reconfiguration Framework. FCCM (2012)
Alexander Wold, Dirk Koch, Jim Tørresen
Design techniques for increasing performance and resource utilization of reconfigurable soft CPUs. DDECS (2012)
Sándor P. Fekete, Tom Kamphans, Nils Schweer, Christopher Tessars, Jan van der Veen, Josef Angermeier, Dirk Koch, Jürgen Teich
Dynamic Defragmentation of Reconfigurable Devices. ACM Trans. Reconfigurable Technol. Syst. 5 (2) (2012)
Dirk Koch, Jim Tørresen, Christian Beckhoff, Daniel Ziener, Christopher Dennl, Volker Breuer, Jürgen Teich, Michael Feilen, Walter Stechele
Partial Reconfiguration on FPGAs in Practice - Tools and Applications. ARCS Workshops (2012)
Christian Beckhoff, Dirk Koch, Jim Tørresen
The Xilinx Design Language (XDL): Tutorial and use cases. ReCoSoC (2011)
Simen Gimle Hansen, Dirk Koch, Jim Tørresen
High Speed Partial Run-Time Reconfiguration Using Enhanced ICAP Hard Macro. IPDPS Workshops (2011)
Alexander Wold, Dirk Koch, Jim Tørresen
Enhancing Resource Utilization with Design Alternatives in Runtime Reconfigurable Systems. IPDPS Workshops (2011)
Kazi Shah Nawaz Ripon, Kyrre Glette, Dirk Koch, Mats Høvin, Jim Tørresen
Genetic algorithm using a modified backward pass heuristic for the dynamic facility layout problem. Paladyn J. Behav. Robotics 2 (3) (2011)
Dirk Koch, Jim Tørresen
FPGASort: a high performance sorting architecture exploiting run-time reconfiguration on fpgas for large problem sorting. FPGA (2011)
Dirk Koch, Jim Tørresen
A Routing Architecture for Mapping Dataflow Graphs at Run-Time. FPL (2011)
Christian Beckhoff, Dirk Koch, Jim Tørresen
Migrating Static Systems to Partially Reconfigurable Systems on Spartan-6 FPGAs. IPDPS Workshops (2011)
Dirk Koch, Jim Tørresen
Routing optimizations for component-based system design and partial run-time reconfiguration on FPGAs. FPT (2010)
Christian Beckhoff, Dirk Koch, Jim Tørresen
Short-Circuits on FPGAs Caused by Partial Runtime Reconfiguration. FPL (2010)
Jim Tørresen, Dirk Koch
A new project to address run-time reconfigurable hardware systems. Dynamically Reconfigurable Architectures (2010)
Dirk Koch, Christian Beckhoff, Jim Tørresen
Zero logic overhead integration of partially reconfigurable modules. SBCCI (2010)
Dirk Koch, Christian Beckhoff, Jim Tørresen
Fine-Grained Partial Runtime Reconfiguration on Virtex-5 FPGAs. FCCM (2010)
Dirk Koch, Christian Beckhoff, Jim Tørresen
Advanced partial run-time reconfiguration on Spartan-6 FPGAs. FPT (2010)
Dirk Koch
Advances in Component-based System Design and Partial Run-time Reconfiguration. Dynamically Reconfigurable Architectures (2010)
Dirk Koch, Christian Beckhoff, Jim Tørresen
Obstacle-free two-dimensional online-routing for run-time reconfigurable FPGA-based systems. FPT (2010)
Andreas Oetken, Stefan Wildermann, Jürgen Teich, Dirk Koch
A Bus-Based SoC Architecture for Flexible Module Placement on Reconfigurable FPGAs. FPL (2010)
Sándor P. Fekete, Tom Kamphans, Nils Schweer, Christopher Tessars, Jan van der Veen, Josef Angermeier, Dirk Koch, Jürgen Teich
No-Break Dynamic Defragmentation of Reconfigurable CoRR (2010)
Dirk Koch, Christian Beckhoff, Jürgen Teich
Hardware Decompression Techniques for FPGA-Based Embedded Systems. ACM Trans. Reconfigurable Technol. Syst. 2 (2) (2009)
Dirk Koch, Christian Beckhoff, Jürgen Teich
Minimizing Internal Fragmentation by Fine-Grained Two-Dimensional Module Placement for Runtime Reconfiguralble Systems. FCCM (2009)
Dirk Koch, Christian Beckhoff, Jürgen Teich
A communication architecture for complex runtime reconfigurable systems and its implementation on spartan-3 FPGAs. FPGA (2009)
Sándor P. Fekete, Tom Kamphans, Nils Schweer, Christopher Tessars, Jan van der Veen, Josef Angermeier, Dirk Koch, Jürgen Teich
No-break dynamic defragmentation of reconfigurable devices. FPL (2008)
Robert Brendle, Thilo Streichert, Dirk Koch, Christian Haubelt, Jürgen Teich
Dynamic Reconfiguration of FlexRay Schedules for Response Time Reduction in Asynchronous Fault-Tolerant Networks. ARCS (2008)
Dirk Koch, Christian Beckhoff, Jürgen Teich
ReCoBus-Builder - A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAS. FPL (2008)
Martin Rump, Gero Müller, Ralf Sarlette, Dirk Koch, Reinhard Klein
Photo-realistic Rendering of Metallic Car Paint from Image-Based Measurements. Comput. Graph. Forum 27 (2) (2008)

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Publication Activity (10 Years)

Top Topics

Top Venues

Dirk Koch