Miriam Leeser

ORCID

Publication Activity (10 Years)

Years Active: 1986-2024
Publications (10 Years): 70

Top Venues

HPEC

CoRR

ACM Trans. Reconfigurable Technol. Syst.

FPL

University of Cambridge, UK (PHD)

Education History

University of Cambridge, UK

PHD

Publications

Yiyue Jiang, Andrius Vaicaitis, John Dooley, Miriam Leeser
Efficient Neural Networks on the Edge with FPGAs by Optimizing an Adaptive Activation Function. Sensors 24 (6) (2024)
Xuan Shen, Zhenglun Kong, Changdi Yang, Zhaoyang Han, Lei Lu, Peiyan Dong, Cheng Lyu, Chih-hsiang Li, Xuehang Guo, Zhihao Shu, Wei Niu, Miriam Leeser, Pu Zhao, Yanzhi Wang
EdgeQAT: Entropy and Distribution Guided Quantization-Aware Training for the Acceleration of Lightweight LLMs on the Edge. CoRR (2024)
Yiyue Jiang, Andrius Vaicaitis, John Dooley, Miriam Leeser
Efficient Neural Networks on the Edge with FPGAs by Optimizing an Adaptive Activation Function. FPGA (2024)
Sandeep Bal, Zhaoyang Han, Suranga Handagala, Mert Cevik, Michael Zink, Miriam Leeser
P4-Based In-Network Telemetry for FPGAs in the Open Cloud Testbed and FABRIC. INFOCOM (Workshops) (2024)
Dana Diaconu, Yanyue Xie, Mehmet Güngör, Suranga Handagala, Xue Lin, Miriam Leeser
Machine Learning Across Network-Connected FPGAs. HPEC (2023)
Justin Kawakami, Dominik Zajac, Miriam Leeser
Selective Encryption of Compressed Image Regions on the Edge with Reconfigurable Hardware. HPEC (2023)
Adarsh Salagame, Maria Gianello, Chenghao Wang, Kaushik Venkatesh Krishnamurthy, Shreyansh Pitroda, Rohit Rajput, Eric Sihite, Miriam Leeser, Alireza Ramezani
Quadrupedal Locomotion Control On Inclined Surfaces Using Collocation Method. CoRR (2023)
Kai Huang, Mehmet Güngör, Suranga Handagala, Stratis Ioannidis, Miriam Leeser
Accelerating Garbled Circuits in the Open Cloud Testbed with Multiple Network-Attached FPGAs. HPEC (2023)
Miriam Leeser
Artifact Evaluation for ACM TRETS Papers Submitted from the FPT Journal Track. ACM Trans. Reconfigurable Technol. Syst. 16 (3) (2023)
Zhaoyang Han, Suranga Handagala, Kalyani Patle, Michael Zink, Miriam Leeser
A Framework to Enable Runtime Programmable P4-enabled FPGAs in the Open Cloud Testbed. INFOCOM Workshops (2023)
Yiyue Jiang, Andrius Vaicaitis, Miriam Leeser, John Dooley
Neural Network on the Edge: Efficient and Low Cost FPGA Implementation of Digital Predistortion in MIMO Systems. DATE (2023)
Mengshu Sun, Zhengang Li, Alec Lu, Haoyu Ma, Geng Yuan, Yanyue Xie, Hao Tang, Yanyu Li, Miriam Leeser, Zhangyang Wang, Xue Lin, Zhenman Fang
FPGA-aware automatic acceleration framework for vision transformer with mixed-scheme quantization: late breaking results. DAC (2022)
Michaela Blott, Alina Vasilciuc, Miriam Leeser, Linda Doyle
Evaluating Theoretical Baselines for ML Benchmarking Across Different Accelerators. IEEE Des. Test 39 (3) (2022)
Zhaoyang Han, Yiyue Jiang, Rahul Mushini, John Dooley, Miriam Leeser
Hardware Software Codesign of Applications on the Edge: Accelerating Digital PreDistortion for Wireless Communications. HPEC (2022)
Mehmet Güngör, Kai Huang, Stratis Ioannidis, Miriam Leeser
Optimizing Designs Using Several Types of Memories on Modern FPGAs. HPEC (2022)
Zhengang Li, Mengshu Sun, Alec Lu, Haoyu Ma, Geng Yuan, Yanyue Xie, Hao Tang, Yanyu Li, Miriam Leeser, Zhangyang Wang, Xue Lin, Zhenman Fang
Auto-ViT-Acc: An FPGA-Aware Automatic Acceleration Framework for Vision Transformer with Mixed-Scheme Quantization. FPL (2022)
Christophe Bobda, Joel Mandebi Mbongue, Paul Chow, Mohammad Ewais, Naif Tarafdar, Juan Camilo Vega, Ken Eguro, Dirk Koch, Suranga Handagala, Miriam Leeser, Martin C. Herbordt, Hafsah Shahzad, Peter Hofste, Burkhard Ringlein, Jakub Szefer, Ahmed Sanaullah, Russell Tessier
The Future of FPGA Acceleration in Datacenters and the Cloud. ACM Trans. Reconfigurable Technol. Syst. 15 (3) (2022)
Dana Diaconu, Lucian Petrica, Michaela Blott, Miriam Leeser
Machine Learning Aided Hardware Resource Estimation for FPGA DNN Implementations. IPDPS Workshops (2022)
Zhengang Li, Mengshu Sun, Alec Lu, Haoyu Ma, Geng Yuan, Yanyue Xie, Hao Tang, Yanyu Li, Miriam Leeser, Zhangyang Wang, Xue Lin, Zhenman Fang
Auto-ViT-Acc: An FPGA-Aware Automatic Acceleration Framework for Vision Transformer with Mixed-Scheme Quantization. CoRR (2022)
Suranga Handagala, Miriam Leeser, Kalyani Patle, Michael Zink
Network Attached FPGAs in the Open Cloud Testbed (OCT). INFOCOM Workshops (2022)
Jieming Xu, Miriam Leeser
Accelerating Matrix Processing for MIMO Systems. HEART (2021)
Michaela Blott, Nicholas J. Fraser, Giulio Gambardella, Lisa Halder, Johannes Kath, Zachary Neveu, Yaman Umuroglu, Alina Vasilciuc, Miriam Leeser, Linda Doyle
Evaluation of Optimized CNNs on Heterogeneous Accelerators Using a Novel Benchmarking Approach. IEEE Trans. Computers 70 (10) (2021)
Miriam Leeser, Suranga Handagala, Michael Zink, Volodymyr V. Kindratenko, Anne C. Elster
FPGAs in the Cloud. Comput. Sci. Eng. 23 (6) (2021)
Michael Zink, David E. Irwin, Emmanuel Cecchet, Hakan Saplakoglu, Orran Krieger, Martin C. Herbordt, Michael Daitzman, Peter Desnoyers, Miriam Leeser, Suranga Handagala
The Open Cloud Testbed (OCT): A Platform for Research into new Cloud Technologies. CloudNet (2021)
Zhaoyang Han, Méabh Loughman, Yiyue Jiang, Rahul Mushini, Miriam Leeser, John Dooley
Computationally Efficient Look-up-Tables for Behavioral Modelling and Digital Pre-distortion of Multi-standard Wireless Systems. CrownCom/WiCON (2021)
Mahsa Bayati, Miriam Leeser, Jaydeep P. Bardhan
High-performance transformation of protein structure representation from internal to Cartesian coordinates. J. Comput. Chem. 41 (24) (2020)
Michaela Blott, Johannes Kath, Lisa Halder, Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Miriam Leeser, Linda Doyle
Evaluation of Optimized CNNs on FPGA and non-FPGA based Accelerators using a Novel Benchmarking Approach. FPGA (2020)
Suranga Handagala, Miriam Leeser
Demonstrating Spectrally Efficient Asynchronous Coexistence for Machine Type Communication: A Software Defined Radio Approach. CrownCom (2020)
Mohamed Mohamed, Suranga Handagala, Jieming Xu, Miriam Leeser, Marvin Onabajo
Strategies and Demonstration to Support Multiple Wireless Protocols with a Single RF Front-End. IEEE Wirel. Commun. 27 (3) (2020)
Mahsa Bayati, Miriam Leeser, Ningfang Mi
Exploiting GPU Direct Access to Non-Volatile Memory to Accelerate Big Data Processing. HPEC (2020)
Prasidh Ramabadran, Pavel Afanasyev, David Malone, Miriam Leeser, Darragh McCarthy, Bill O'Brien, Ronan Farrell, John Dooley
A Novel Physical Layer Authentication With PAPR Reduction Based on Channel and Hardware Frequency Responses. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2020)
Mengshu Sun, Pu Zhao, Mehmet Güngör, Massoud Pedram, Miriam Leeser, Xue Lin
3D CNN Acceleration on FPGA using Hardware-Aware Pruning. DAC (2020)
Kai Huang, Mehmet Güngör, Stratis Ioannidis, Miriam Leeser
Optimizing Use of Different Types of Memory for FPGAs in High Performance Computing. HPEC (2020)
Suranga Handagala, Miriam Leeser
Real Time Receiver Baseband Processing Platform for Sub 6 GHz PHY Layer Experiments. IEEE Access 8 (2020)
Miriam Leeser, Suranga Handagala, Mohamed Mohamed, Jieming Xu, Marvin Onabajo
An FPGA Design Technique to Receive Multiple Wireless Protocols with the Same RF Front End. Wireless Days (2019)
Miriam Leeser, Mehmet Güngör, Kai Huang, Stratis Ioannidis
Accelerating Large Garbled Circuits on an FPGA-enabled Cloud. H2RC@SC (2019)
Xin Fang, Stratis Ioannidis, Miriam Leeser
SIFO: Secure Computational Infrastructure Using FPGA Overlays. Int. J. Reconfigurable Comput. 2019 (2019)
Michaela Blott, Lisa Halder, Miriam Leeser, Linda Doyle
QuTiBench: Benchmarking Neural Networks on Heterogeneous Hardware. ACM J. Emerg. Technol. Comput. Syst. 15 (4) (2019)
Mahsa Bayati, Miriam Leeser, Yijia Gu, Thomas Wahl
Identifying volatile numeric expressions in numeric computing applications. Math. Comput. Simul. 166 (2019)
Michaela Blott, Lisa Halder, Miriam Leeser, Linda Doyle
QuTiBench: Benchmarking Neural Networks on Heterogeneous Hardware. CoRR (2019)
Xin Fang, Stratis Ioannidis, Miriam Leeser
SIFO: Secure Computational Infrastructure using FPGA Overlays. CoRR (2019)
Janki Bhimani, Ningfang Mi, Miriam Leeser, Zhengyu Yang
New Performance Modeling Methods for Parallel Data Processing Applications. ACM Trans. Model. Comput. Simul. 29 (3) (2019)
Kai Huang, Mehmet Güngör, Xin Fang, Stratis Ioannidis, Miriam Leeser
Garbled Circuits in the Cloud using FPGA Enabled Nodes. HPEC (2019)
Jieming Xu, Miriam Leeser
High-Level and Compact Design of Cross-Channel LTE DownLink Channel Encoder. CrownCom (2018)
Benjamin Drozdenko, Matthew Zimmermann, Tuan Dao, Kaushik R. Chowdhury, Miriam Leeser
Hardware-Software Codesign of Wireless Transceivers on Zynq Heterogeneous Systems. IEEE Trans. Emerg. Top. Comput. 6 (4) (2018)
Chao Liu, Miriam Leeser
Local and Global Shared Memory for Task Based HPC Applications on Heterogeneous Platforms. PDP (2018)
Suranga Handagala, Mohamed Mohamed, Jieming Xu, Marvin Onabajo, Miriam Leeser
Detection of Different Wireless Protocols on an FPGA with the Same Analog/RF Front End. CrownCom (2018)
Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic. CoRR (2018)
John Terragnoli, Miriam Leeser, Paul Monticciolo
Stripmap SAR Pulse Interleaved Scheduling. HPEC (2018)
Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser, Kees A. Vissers
: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks. ACM Trans. Reconfigurable Technol. Syst. 11 (3) (2018)
Yanji Chen, Mehmet Güngör, Shweta Singh, Alex Tazin, Mieczyslaw M. Kokar, Miriam Leeser
Dynamic Deployment of Communication Applications to Different Hardware Platforms using Ontological Representations. HPEC (2018)
Declan Byrne, Ronan Farrell, Sidath Madhuwantha, Miriam Leeser, John Dooley
Digital Pre-distortion Implemented Using FPGA. FPL (2018)
Jieming Xu, Miriam Leeser
Cross Component Optimization for Modern LTE Downlink Shared Channel Implementation. FCCM (2018)
Benjamin Drozdenko, Suranga Handagala, Kaushik R. Chowdhury, Miriam Leeser
FPGA modeling techniques for detecting and demodulating multiple wireless protocols. FPL (2017)
Janki Bhimani, Ningfang Mi, Miriam Leeser, Zhengyu Yang
FIM: Performance Prediction for Parallel Computation in Iterative Data Processing Applications. CLOUD (2017)
Xin Fang, Stratis Ioannidis, Miriam Leeser
Secure Function Evaluation Using an FPGA Overlay Architecture. FPGA (2017)
Chao Liu, Janki Bhimani, Miriam Leeser
Using High Level GPU Tasks to Explore Memory and Communications Options on Heterogeneous Platforms. SEM4HPC@HPDC (2017)
Janki Bhimani, Zhengyu Yang, Miriam Leeser, Ningfang Mi
Accelerating big data applications using lightweight virtualization framework on enterprise cloud. HPEC (2017)
Chao Liu, Miriam Leeser
A Framework for Developing Parallel Applications with high level Tasks on Heterogeneous Platforms. PMAM@PPoPP (2017)
Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic. ICCD (2017)
Ramanathan Subramanian, Eric Doyle, Benjamin Drozdenko, Miriam Leeser, Kaushik R. Chowdhury
State-Action Based Link Layer Design for IEEE 802.11b Compliant MATLAB-Based SDR. DCOSS (2016)
Benjamin Drozdenko, Matthew Zimmermann, Tuan Dao, Miriam Leeser, Kaushik R. Chowdhury
High-level hardware-software co-design of an 802.11a transceiver system using Zynq SoC. INFOCOM Workshops (2016)
Ramanathan Subramanian, Benjamin Drozdenko, Eric Doyle, Rameez Ahmed, Miriam Leeser, Kaushik R. Chowdhury
High-Level System Design of IEEE 802.11b Standard-Compliant Link Layer for MATLAB-Based SDR. CoRR (2016)
Janki Bhimani, Ningfang Mi, Miriam Leeser
Performance prediction techniques for scalable large data processing in distributed MPI systems. IPCCC (2016)
Ramanathan Subramanian, Benjamin Drozdenko, Eric Doyle, Rameez Ahmed, Miriam Leeser, Kaushik Roy Chowdhury
High-Level System Design of IEEE 802.11b Standard-Compliant Link Layer for MATLAB-Based SDR. IEEE Access 4 (2016)
Janki Bhimani, Miriam Leeser, Ningfang Mi
Design space exploration of GPU Accelerated cluster systems for optimal data transfer using PCIe bus. HPEC (2016)
Benjamin Drozdenko, Matthew Zimmermann, Tuan Dao, Kaushik R. Chowdhury, Miriam Leeser
Modeling considerations for the hardware-software co-design of flexible modern wireless transceivers. FPL (2016)
Chao Liu, Miriam Leeser
Unified and lightweight tasks and conduits: A high level parallel programming framework. HPEC (2016)
Majid Sabbagh, Martin Uecker, Andrew J. Powell, Miriam Leeser, Mehdi Hedjazi Moghari
Cardiac MRI compressed sensing image reconstruction with a graphics processing unit. ISMICT (2016)
Xin Fang, Miriam Leeser
Open-Source Variable-Precision Floating-Point Library for Major Commercial FPGAs. ACM Trans. Reconfigurable Technol. Syst. 9 (3) (2016)
Pei Luo, Yunsi Fei, Xin Fang, A. Adam Ding, David R. Kaeli, Miriam Leeser
Side-Channel Analysis of MAC-Keccak Hardware Implementations. IACR Cryptol. ePrint Arch. 2015 (2015)
Xin Fang, Pei Luo, Yunsi Fei, Miriam Leeser
Leakage evaluation on power balance countermeasure against side-channel attack on FPGAs. HPEC (2015)
Benjamin Drozdenko, Ramanathan Subramanian, Kaushik R. Chowdhury, Miriam Leeser
Implementing a MATLAB-Based Self-configurable Software Defined Radio Transceiver. CrownCom (2015)
Yijia Gu, Thomas Wahl, Mahsa Bayati, Miriam Leeser
Behavioral Non-portability in Scientific Numeric Computing. Euro-Par (2015)
Xin Fang, Pei Luo, Yunsi Fei, Miriam Leeser
Balance power leakage to fight against side-channel analysis at gate level in FPGAs. ASAP (2015)
Janki Bhimani, Miriam Leeser, Ningfang Mi
Accelerating K-Means clustering with parallel implementations and GPU computing. HPEC (2015)
Mahsa Bayati, Jaydeep P. Bardhan, Miriam Leeser
GPU implementation of reverse coordinate conversion for proteins. HPEC (2015)
Nicholas Moore, Miriam Leeser, Laurie A. Smith King
Kernel Specialization Provides Adaptable GPU Code for Particle Image Velocimetry. IEEE Trans. Parallel Distributed Syst. 26 (4) (2015)
Pei Luo, Yunsi Fei, Xin Fang, A. Adam Ding, David R. Kaeli, Miriam Leeser
Side-channel analysis of MAC-Keccak hardware implementations. HASP@ISCA (2015)
Pei Luo, Yunsi Fei, Xin Fang, A. Adam Ding, Miriam Leeser, David R. Kaeli
Power Analysis Attack on Hardware Implementation of MAC-Keccak on FPGAs. IACR Cryptol. ePrint Arch. 2014 (2014)
Pei Luo, Yunsi Fei, Xin Fang, A. Adam Ding, Miriam Leeser, David R. Kaeli
Power analysis attack on hardware implementation of MAC-Keccak on FPGAs. ReConFig (2014)
Jonathon Pendlum, Miriam Leeser, Kaushik R. Chowdhury
Reducing Processing Latency with a Heterogeneous FPGA-Processor Framework. FCCM (2014)
Mahsa Bayati, Jaydeep P. Bardhan, David M. King, Miriam Leeser
Accelerating protein coordinate conversion using GPUs. HPEC (2014)
Miriam Leeser, Saoni Mukherjee, Jaideep Ramachandran, Thomas Wahl
Make it real: Effective floating-point reasoning via exact arithmetic. DATE (2014)
Xin Fang, Miriam Leeser
Vendor agnostic, high performance, double precision Floating Point division for FPGAs. HPEC (2013)
Nicholas Moore, Miriam Leeser, Laurie A. Smith King
Kernel Specialization for Improved Adaptability and Performance on Graphics Processing Units (GPUs). IPDPS (2013)
Peter Grossmann, Miriam Leeser, Marvin Onabajo
Minimum energy operation for clustered island-style FPGAs. FPGA (2013)
David A. Kusinsky, Miriam Leeser
FPGA-based hyperspectral covariance coprocessor for size, weight, and power constrained platforms. HPEC (2013)
Saoni Mukherjee, Nicholas Moore, James Brock, Miriam Leeser
CUDA and OpenCL implementations of 3D CT reconstruction for biomedical imaging. HPEC (2012)
George Eichinger, Kaushik R. Chowdhury, Miriam Leeser
CRUSH: Cognitive Radio Universal Software Hardware. FPL (2012)
Mary Ellen Tie, Miriam Leeser
Implementing Murf: Accelerating Large State Space Exploration on FPGAs. FCCM (2012)
Peter Grossmann, Miriam Leeser, Marvin Onabajo
Minimum Energy Analysis and Experimental Verification of a Latch-Based Subthreshold FPGA. IEEE Trans. Circuits Syst. II Express Briefs (12) (2012)
George Eichinger, Kaushik R. Chowdhury, Miriam Leeser
Cognitive Radio Universal Software Hardware. FCCM (2012)
Nicholas Moore, Miriam Leeser, Laurie A. Smith King
VForce: An environment for portable applications on high performance systems with accelerators. J. Parallel Distributed Comput. 72 (9) (2012)
Scott Bailie, Miriam Leeser
Incremental clustering applied to radar deinterleaving: a parameterized FPGA implementation. FPGA (2012)
George Eichinger, Kaushik R. Chowdhury, Miriam Leeser
Cognitive radio universal software hardware. DySPAN (2012)
Peter Grossmann, Miriam Leeser
A prototype FPGA for subthreshold-optimized CMOS (abstract only). FPGA (2011)
Miriam Leeser, Devon Yablonski, Dana H. Brooks, Laurie A. Smith King
The challenges of writing portable, correct and high performance libraries for GPUs. SIGARCH Comput. Archit. News 39 (4) (2011)
Jainik Kathiara, Miriam Leeser
An Autonomous Vector/Scalar Floating Point Coprocessor for FPGAs. FCCM (2011)
Xiaojun Wang, Miriam Leeser
VFloat: A Variable Precision Fixed- and Floating-Point Library for Reconfigurable Hardware. ACM Trans. Reconfigurable Technol. Syst. 3 (3) (2010)

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Publication Activity (10 Years)

Top Topics

Top Venues

Miriam Leeser