3D CNN Acceleration on FPGA using Hardware-Aware Pruning.
Mengshu SunPu ZhaoMehmet GüngörMassoud PedramMiriam LeeserXue LinPublished in: DAC (2020)
Keyphrases
- field programmable gate array
- hardware implementation
- hardware architecture
- low cost
- parallel hardware
- hardware design
- real time
- dedicated hardware
- software implementation
- single chip
- cellular neural networks
- fpga implementation
- xilinx virtex
- programmable logic
- reconfigurable hardware
- hardware architectures
- embedded systems
- fpga technology
- low power consumption
- data acquisition
- low power
- fpga device
- hardware and software
- digital signal processing
- pruning method
- fpga hardware
- hardware description language
- search space
- high speed
- parallel architecture
- signal processing
- image processing algorithms
- computing systems
- parallel architectures
- pruning algorithms
- parallel computing
- efficient implementation
- fixed point
- computing power
- pruning strategy
- general purpose
- digital circuits
- pruning algorithm
- convolutional neural network
- image processing
- hardware software co design
- neural network