Thomas B. Preußer

ORCID

Publication Activity (10 Years)

Years Active: 2005-2024
Publications (10 Years): 30

Top Venues

CoRR

FPL

ACM Trans. Reconfigurable Technol. Syst.

ReConFig

Dresden University of Technology (PHD)

Education History

Dresden University of Technology

PHD

Publications

Konstantin Hoßfeld, Hans Jakob Damsgaard, Jari Nurmi, Michaela Blott, Thomas B. Preußer
High-efficiency Compressor Trees for Latest AMD FPGAs. ACM Trans. Reconfigurable Technol. Syst. 17 (2) (2024)
Monica Chiosa, Thomas B. Preußer, Michaela Blott, Gustavo Alonso
AMNES: Accelerating the computation of data correlation using FPGAs. Proc. VLDB Endow. 16 (13) (2023)
Syed Asad Alam, David Gregg, Giulio Gambardella, Thomas B. Preußer, Michaela Blott
On the RTL Implementation of FINN Matrix Vector Unit. ACM Trans. Embed. Comput. Syst. 22 (6) (2023)
Shivam Aggarwal, Alessandro Pappalardo, Hans Jakob Damsgaard, Giuseppe Franco, Thomas B. Preußer, Michaela Blott, Tulika Mitra
Post-Training Quantization with Low-precision Minifloats and Integers on FPGAs. CoRR (2023)
Thomas B. Preußer, Smitha Gautham, Abhi D. Rajagopala, Carl R. Elks, Alexander Weiss
Everything You Always Wanted to Know About Embedded Trace. Computer 55 (2) (2022)
Wenqi Jiang, Zhenhao He, Shuai Zhang, Thomas B. Preußer, Kai Zeng, Liang Feng, Jiansong Zhang, Tongxuan Liu, Yong Li, Jingren Zhou, Ce Zhang, Gustavo Alonso
MicroRec: Efficient Recommendation Inference by Hardware and Data Structure Solutions. MLSys (2021)
Alexander Weiss, Smitha Gautham, Athira Varma Jayakumar, Carl R. Elks, D. Richard Kuhn, Raghu N. Kacker, Thomas B. Preußer
Understanding and Fixing Complex Faults in Embedded Cyberphysical Systems. Computer 54 (1) (2021)
Alexander Weiss, Smitha Gautham, Athira Varma Jayakumar, Carl R. Elks, D. Richard Kuhn, Raghu N. Kacker, Thomas B. Preußer
Understanding and Fixing Complex Faults in Embedded Cyberphysical Systems. CoRR (2021)
Amit Kulkarni, Monica Chiosa, Thomas B. Preußer, Kaan Kara, David Sidler, Gustavo Alonso
HyperLogLog Sketch Acceleration on FPGA. FPL (2020)
Thomas B. Preußer, Monica Chiosa, Alexander Weiss, Gustavo Alonso
Using DSP Slices as Content-Addressable Update Queues. FPL (2020)
Amit Kulkarni, Monica Chiosa, Thomas B. Preußer, Kaan Kara, David Sidler, Gustavo Alonso
HyperLogLog Sketch Acceleration on FPGA. CoRR (2020)
Thomas B. Preußer, Monica Chiosa, Alexander Weiss, Gustavo Alonso
Using DSP Slices as Content-Addressable Update Queues. CoRR (2020)
Wenqi Jiang, Zhenhao He, Shuai Zhang, Thomas B. Preußer, Kai Zeng, Liang Feng, Jiansong Zhang, Tongxuan Liu, Yong Li, Jingren Zhou, Ce Zhang, Gustavo Alonso
MicroRec: Accelerating Deep Recommendation Systems to Microseconds by Hardware and Data Structure Solutions. CoRR (2020)
Yaman Umuroglu, Davide Conficconi, Lahiru Rasnayake, Thomas B. Preußer, Magnus Själander
Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing. ACM Trans. Reconfigurable Technol. Syst. 12 (3) (2019)
Yaman Umuroglu, Davide Conficconi, Lahiru Rasnayake, Thomas B. Preußer, Magnus Själander
Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing. CoRR (2019)
Matthias R. Engelhardt, Thomas B. Preußer
An easy counting lemma. Discret. Appl. Math. 257 (2019)
Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu
FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks. CoRR (2018)
Thomas B. Preußer
Generic and Universal Parallel Matrix Summation with a Flexible Compression Goal for Xilinx FPGAs. CoRR (2018)
Thomas B. Preußer
QBM - Mapping User-Specified Functions to Programmable Logic through a QBF Satisfiability Problem. CoRR (2018)
Thomas B. Preußer, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott
Inference of quantized neural networks on heterogeneous all-programmable devices. DATE (2018)
Thomas B. Preußer, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott
Inference of Quantized Neural Networks on Heterogeneous All-Programmable Devices. CoRR (2018)
Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic. CoRR (2018)
Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser, Kees A. Vissers
: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks. ACM Trans. Reconfigurable Technol. Syst. 11 (3) (2018)
Thomas B. Preußer, Matthias R. Engelhardt
Putting Queens in Carry Chains, N o̱27. J. Signal Process. Syst. 88 (2) (2017)
Thomas B. Preußer
Generic and universal parallel matrix summation with a flexible compression goal for Xilinx FPGAs. FPL (2017)
Patrick Russell, Jens Döge, Christoph Hoppe, Thomas B. Preußer, Peter Reichel, Peter Schneider
Implementation of an asynchronous bundled-data router for a GALS NoC in the context of a VSoC. DDECS (2017)
Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic. ICCD (2017)
Thomas B. Preußer, Fredo Erxleben
Design Kernel Exploration Using QBF-Based Boolean Matching. SiPS (2016)
Thomas B. Preußer, Martin Zabel, Patrick Lehmann, Rainer G. Spallek
The portable open-source IP core and utility library PoC. ReConFig (2016)
Thomas B. Preußer, Markus Krause
Survey on and re-evaluation of wide adder architectures on FPGAs. ReConFig (2016)
Kai-Uwe Irrgang, Thomas B. Preußer, Rainer G. Spallek
Kompression von Tracedaten auf Bitebene basierend auf einem LZ77-Wörterbuchansatz. GI-Jahrestagung (2015)
Kai-Uwe Irrgang, Thomas B. Preußer
An LZ77-style bit-level compression for trace data compaction. FPL (2015)
Thomas B. Preußer, Oliver Knodel, Rainer G. Spallek
PoC-align: An open-source alignment accelerator using FPGAs. ReConFig (2014)
Thomas B. Preußer, Rainer G. Spallek
Ready PCIe data streaming solutions for FPGAs. FPL (2014)
Patrick Lehmann, Thomas Frank, Oliver Knodel, Steffen Köhler, Thomas B. Preußer, Rainer G. Spallek
Weasel: A platform-independent streaming-optimized SATA controller. FPL (2013)
Thomas B. Preußer, Oliver Knodel, Rainer G. Spallek
Short-Read Mapping by a Systolic Custom FPGA Computation. FCCM (2012)
Martin Zabel, Thomas B. Preußer, Rainer G. Spallek
Increasing the efficiency of an embedded multi-core bytecode processor using an object cache. JTRES (2012)
Thomas B. Preußer, Martin Zabel, Rainer G. Spallek
Accelerating Computations on FPGA Carry Chains by Operand Compaction. IEEE Symposium on Computer Arithmetic (2011)
Oliver Knodel, Thomas B. Preußer, Rainer G. Spallek
Next-generation massively parallel short-read mapping on FPGAs. ASAP (2011)
Hong Diep Nguyen, Bogdan Pasca, Thomas B. Preußer
FPGA-Specific Arithmetic Optimizations of Short-Latency Adders. FPL (2011)
Thomas B. Preußer, Rainer G. Spallek
Enhancing FPGA Device Capabilities by the Automatic Logic Mapping to Additive Carry Chains. FPL (2010)
Michael Dittrich, Thomas B. Preußer, Rainer G. Spallek
Solving Sudokus through an incidence matrix on an FPGA. FPT (2010)
Martin Schoeberl, Thomas B. Preußer, Sascha Uhrig
The embedded Java benchmark suite JemBench. JTRES (2010)
Thomas B. Preußer, Peter Reichel, Rainer G. Spallek
An Embedded GC Module with Support for Multiple Mutators and Weak References. ARCS (2010)
Martin Zabel, Thomas B. Preußer, Rainer G. Spallek
High-Level Architecture Modelling Assisting the Processor Platform Development, Debugging and Simulation. MBMV (2009)
Thomas B. Preußer, Rainer G. Spallek
Mapping basic prefix computations to fast carry-chain structures. FPL (2009)
Martin Zabel, Thomas B. Preußer, Peter Reichel, Rainer G. Spallek
Secure, Real-Time and Multi-Threaded General-Purpose Embedded Java Microarchitecture. DSD (2007)
Thomas B. Preußer, Rainer G. Spallek
Analysis of a Fully-Scalable Digital Fractional Clock Divider. ASAP (2006)
Martin Zabel, Steffen Köhler, Martin Zimmerling, Thomas B. Preußer, Rainer G. Spallek
Design space exploration of coarse-grain reconfigurable DSPs. ReConFig (2005)

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Publication Activity (10 Years)

Top Topics

Top Venues

Thomas B. Preußer