A Soft Dual-Processor System with a Partially Run-Time Reconfigurable Shared 128-Bit SIMD Engine.
Jose Raul Garcia OrdazDirk KochPublished in: ASAP (2018)
Keyphrases
- parallel processing
- single instruction multiple data
- parallel architectures
- digital signal
- random access memory
- systolic array
- highly parallel
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- massively parallel
- central processing unit
- compute intensive
- hardware implementation
- smart camera
- functional units
- reconfigurable architecture
- high speed
- parallel algorithm
- processing elements
- shared memory multiprocessors
- xilinx virtex
- parallel processors
- address space
- parallel implementation
- parallel architecture
- computer architecture
- real time
- multiprocessor systems
- shared memory
- computation intensive
- processor core
- high end
- field programmable gate array
- air fuel ratio
- parallel computing