Christopher J. Hughes

Publication Activity (10 Years)

Years Active: 2001-2023
Publications (10 Years): 17

Top Topics

Hardware Design

Conflict Management

Transactional Memory

Top Venues

Publications

Geonhwa Jeong, Sana Damani, Abhimanyu Rajeshkumar Bambhaniya, Eric Qin, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna
VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs. HPCA (2023)
Geonhwa Jeong, Sana Damani, Abhimanyu Rajeshkumar Bambhaniya, Eric Qin, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna
VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs. CoRR (2023)
Zhangxiaowen Gong, Houxiang Ji, Yao Yao, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas
Graphite: optimizing graph neural networks on CPUs through cooperative software-hardware techniques. ISCA (2022)
Rohan Baskar Prabhakar, Sachit Kuhar, Rohit Agrawal, Christopher J. Hughes, Christopher W. Fletcher
SumMerge: an efficient algorithm and implementation for weight repetition-aware DNN inference. ICS (2021)
Geonhwa Jeong, Eric Qin, Ananda Samajdar, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU. DAC (2021)
Geonhwa Jeong, Eric Qin, Ananda Samajdar, Christopher J. Hughes, Sreenivas Subramoney, Hyesoon Kim, Tushar Krishna
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU. CoRR (2021)
Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas
SparseTrain: Leveraging Dynamic Sparsity in Software for Training DNNs on General-Purpose SIMD Processors. PACT (2020)
Yi-Hsiang Lai, Hongbo Rong, Size Zheng, Weihao Zhang, Xiuping Cui, Yunshan Jia, Jie Wang, Brendan Sullivan, Zhiru Zhang, Yun Liang, Youhui Zhang, Jason Cong, Nithin George, Jose Alvarez, Christopher J. Hughes, Pradeep Dubey
SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs. ICCAD (2020)
Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Sara Baghsorkhi, Josep Torrellas
SAVE: Sparsity-Aware Vector Engine for Accelerating DNN Training and Inference on CPUs. MICRO (2020)
Zhangxiaowen Gong, Houxiang Ji, Christopher W. Fletcher, Christopher J. Hughes, Josep Torrellas
SparseTrain: Leveraging Dynamic Sparsity in Training DNNs on General-Purpose SIMD Processors. CoRR (2019)
Sunjae Park, Christopher J. Hughes, Milos Prvulovic
Forgive-TM: Supporting Lazy Conflict Detection In Eager Hardware Transactional Memory. PACT (2019)
Nitish Kumar Srivastava, Hongbo Rong, Prithayan Barua, Guanyu Feng, Huanqi Cao, Zhiru Zhang, David H. Albonesi, Vivek Sarkar, Wenguang Chen, Paul Petersen, Geoff Lowney, Adam Herr, Christopher J. Hughes, Timothy G. Mattson, Pradeep Dubey
T2S-Tensor: Productively Generating High-Performance Spatial Hardware for Dense Tensor Computations. FCCM (2019)
Berkin Akin, Chiachen Chou, Jongsoo Park, Christopher J. Hughes, Rajat Agarwal
Dynamic fine-grained sparse memory accesses. MEMSYS (2018)
Sunjae Park, Christopher J. Hughes, Milos Prvulovic
Transactional pre-abort handlers in hardware transactional memory. PACT (2018)
Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Onur Mutlu, Srinivas Devadas
Banshee: bandwidth-efficient DRAM caching via software/hardware cooperation. MICRO (2017)
Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Onur Mutlu, Srinivas Devadas
Banshee: Bandwidth-Efficient DRAM Caching Via Software/Hardware Cooperation. CoRR (2017)
Sunjae Park, Milos Prvulovic, Christopher J. Hughes
PleaseTM: Enabling transaction conflict management in requester-wins hardware transactional memory. HPCA (2016)
Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, Srinivas Devadas
IMP: indirect memory prefetcher. MICRO (2015)
Simon J. Pennycook, Christopher J. Hughes, Mikhail Smelyanskiy, Stephen A. Jarvis
Exploring SIMD for Molecular Dynamics, Using Intel® Xeon® Processors and Intel® Xeon Phi Coprocessors. IPDPS (2013)
Richard M. Yoo, Christopher J. Hughes, Changkyu Kim, Yen-Kuang Chen, Christos Kozyrakis
Locality-aware task management for unstructured parallelism: a quantitative limit study. SPAA (2013)
Richard M. Yoo, Christopher J. Hughes, Konrad Lai, Ravi Rajwar
Performance evaluation of Intel® transactional synchronization extensions for high-performance computing. SC (2013)
Jongsoo Park, Richard M. Yoo, Daya Shanker Khudia, Christopher J. Hughes, Daehyun Kim
Location-aware cache management for many-core processors with deep cache hierarchy. SC (2013)
Jungju Oh, Christopher J. Hughes, Guru Venkataramani, Milos Prvulovic
LIME: a framework for debugging load imbalance in multi-threaded execution. ICSE (2011)
Guangyu Sun, Christopher J. Hughes, Changkyu Kim, Jishen Zhao, Cong Xu, Yuan Xie, Yen-Kuang Chen
Moguls: a model to explore the memory hierarchy for bandwidth improvements. ISCA (2011)
Guru Venkataramani, Christopher J. Hughes, Sanjeev Kumar, Milos Prvulovic
DeFT: Design space exploration for on-the-fly detection of coherence misses. ACM Trans. Archit. Code Optim. 8 (2) (2011)
Christopher J. Hughes, Changkyu Kim, Yen-Kuang Chen
Performance and Energy Implications of Many-Core Caches for Throughput Computing. IEEE Micro 30 (6) (2010)
Kisun You, Jike Chong, Youngmin Yi, Ekaterina Gonina, Christopher J. Hughes, Yen-Kuang Chen, Wonyong Sung, Kurt Keutzer
Parallel scalability in speech recognition. IEEE Signal Process. Mag. 26 (6) (2009)
Jike Chong, Kisun You, Youngmin Yi, Ekaterina Gonina, Christopher J. Hughes, Wonyong Sung, Kurt Keutzer
Scalable HMM based inference engine in large vocabulary continuous speech recognition. ICME (2009)
Yen-Kuang Chen, Jatin Chhugani, Pradeep Dubey, Christopher J. Hughes, Daehyun Kim, Sanjeev Kumar, Victor W. Lee, Anthony D. Nguyen, Mikhail Smelyanskiy
Convergence of Recognition, Mining, and Synthesis Workloads and Its Implications. Proc. IEEE 96 (5) (2008)
Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Yen-Kuang Chen, Jatin Chhugani, Christopher J. Hughes, Changkyu Kim, Victor W. Lee, Anthony D. Nguyen
Atomic Vector Operations on Chip Multiprocessors. ISCA (2008)
Christopher J. Hughes, Radek Grzeszczuk, Eftychios Sifakis, Daehyun Kim, Sanjeev Kumar, Andrew Selle, Jatin Chhugani, Matthew J. Holliman, Yen-Kuang Chen
Physical simulation for animation and visual effects: parallelization and characterization for chip multiprocessors. ISCA (2007)
Trista Pei-Chun Chen, Dmitry Budnikov, Christopher J. Hughes, Yen-Kuang Chen
Computer Vision on Multi-Core Processors: Articulated Body Tracking. ICME (2007)
Sanjeev Kumar, Christopher J. Hughes, Anthony D. Nguyen
Carbon: architectural support for fine-grained parallelism on chip multiprocessors. ISCA (2007)
Sanjeev Kumar, Michael Chu, Christopher J. Hughes, Partha Kundu, Anthony D. Nguyen
Hybrid transactional memory. PPOPP (2006)
Gang Wu, Edward Y. Chang, Yen-Kuang Chen, Christopher J. Hughes
Incremental approximate matrix factorization for speeding up support vector machines. KDD (2006)
Christopher J. Hughes, Sarita V. Adve
Memory-side prefetching for linked data structures for processor-in-memory systems. J. Parallel Distributed Comput. 65 (4) (2005)
Christopher J. Hughes, Sarita V. Adve
A Formal Approach to Frequent Energy Adaptations for Multimedia Applications. ISCA (2004)
Christopher J. Hughes, Vijay S. Pai, Parthasarathy Ranganathan, Sarita V. Adve
RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors. Computer 35 (2) (2002)
Rohit Jain, Christopher J. Hughes, Sarita V. Adve
Soft Real- Time Scheduling on Simultaneous Multithreaded Processors. RTSS (2002)
Ruchira Sasanka, Christopher J. Hughes, Sarita V. Adve
Joint local and global hardware adaptations for energy. ASPLOS (2002)
Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen
Speculative precomputation: long-range prefetching of delinquent loads. ISCA (2001)
Christopher J. Hughes, Praful Kaul, Sarita V. Adve, Rohit Jain, Chanik Park, Jayanth Srinivasan
Variability in the execution of multimedia applications and implications for architecture. ISCA (2001)
Christopher J. Hughes, Jayanth Srinivasan, Sarita V. Adve
Saving energy with architectural and frequency adaptations for multimedia applications. MICRO (2001)