Jamison D. Collins

Publication Activity (10 Years)

Years Active: 1999-2011
Publications (10 Years): 0

Publications

Guilherme Ottoni, Gautham N. Chinya, Gerolf Hoflehner, Jamison D. Collins, Amit Kumar, Ethan Schuchman, David R. Ditzel, Ronak Singhal, Hong Wang
AstroLIT: enabling simulation-based microarchitecture comparison between Intel® and Transmeta designs. Conf. Computing Frontiers (2011)
Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Hong Jiang, Guei-Yuan Lueh, Thomas Piazza, Hong Wang
Bothnia: a dual-personality extension to the Intel integrated graphics driver. ACM SIGOPS Oper. Syst. Rev. 45 (1) (2011)
Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Xiang Zou, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang
Intel nehalem processor core made FPGA synthesizable. FPGA (2010)
Perry H. Wang, Jamison D. Collins, Christopher T. Weaver, Belliappa Kuttanna, Shahram Salamian, Gautham N. Chinya, Ethan Schuchman, Oliver Schilling, Thorsten Doil, Sebastian Steibl, Hong Wang
processor core made FPGA-synthesizable. FPGA (2009)
Omid Azizi, Jamison D. Collins, Dinesh Patil, Hong Wang, Mark Horowitz
Processor Performance Modeling using Symbolic Simulation. ISPASS (2008)
Benjamin C. Lee, Jamison D. Collins, Hong Wang, David M. Brooks
CPR: Composable performance regression for scalable multiprocessor models. MICRO (2008)
Michael D. Linderman, Jamison D. Collins, Hong Wang, Teresa H. Meng
Merge: a programming model for heterogeneous multi-core systems. ASPLOS (2008)
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aamodt, Jamison D. Collins, Perry H. Wang, Gautham N. Chinya, Ankur Khandelwal Groen, Hong Jiang, Hong Wang
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor. PACT (2008)
Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Hong Jiang, Xinmin Tian, Milind Girkar, Nick Y. Yang, Guei-Yuan Lueh, Hong Wang
EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system. PLDI (2007)
Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Bernard Lint, Asit Mallick, Koichi Yamada, Hong Wang
Sequencer virtualization. ICS (2007)
Richard A. Hankins, Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Ryan N. Rakvic, Hong Wang, John Paul Shen
Multiple Instruction Stream Processor. ISCA (2006)
Jamison D. Collins, Dean M. Tullsen
Clustered Multithreaded Architectures - Pursuing both IPC and Cycle Time. IPDPS (2004)
Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen
Helper Threads via Virtual Multithreading. IEEE Micro 24 (6) (2004)
Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen
2 processor-based platform. ASPLOS (2004)
Jamison D. Collins, Dean M. Tullsen, Hong Wang
Control Flow Optimization Via Dynamic Reconvergence Prediction. MICRO (2004)
Jamison D. Collins, Suleyman Sair, Brad Calder, Dean M. Tullsen
Pointer cache assisted prefetching. MICRO (2002)
Perry H. Wang, Hong Wang, Jamison D. Collins, Ed Grochowski, Ralph-Michael Kling, John Paul Shen
Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation. HPCA (2002)
Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen
Speculative precomputation: long-range prefetching of delinquent loads. ISCA (2001)
Jamison D. Collins, Dean M. Tullsen
Runtime identification of cache conflict misses: The adaptive miss buffer. ACM Trans. Comput. Syst. 19 (4) (2001)
Jamison D. Collins, Dean M. Tullsen, Hong Wang, John Paul Shen
Dynamic speculative precomputation. MICRO (2001)
Jamison D. Collins, Dean M. Tullsen
Hardware Identification of Cache Conflict Misses. MICRO (1999)