Tor M. Aamodt

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 54

Top Topics

Top Venues

Publications

Deval Shah, Zi Yu Xue, Karthik Pattabiraman, Tor M. Aamodt
Characterizing and Improving Resilience of Accelerators to Memory Errors in Autonomous Robots. ACM Trans. Cyber Phys. Syst. 8 (3) (2024)
Deval Shah, Tor M. Aamodt
Collision Prediction for Robotics Accelerators. ISCA (2024)
Ishita Chaturvedi, Bhargav Reddy Godala, Yucan Wu, Ziyang Xu, Konstantinos Iliakis, Panagiotis-Eleftherios Eleftherakis, Sotirios Xydis, Dimitrios Soudris, Tyler Sorensen, Simone Campanoni, Tor M. Aamodt, David I. August
GhOST: a GPU Out-of-Order Scheduling Technique for Stall Reduction. ISCA (2024)
Davit Grigoryan, Yuan-Hsi Chou, Tor M. Aamodt
Zatel: Sample Complexity-Aware Scale-Model Simulation for Ray Tracing. ISPASS (2024)
Deval Shah, Ningfeng Yang, Tor M. Aamodt
Energy-Efficient Realtime Motion Planning. ISCA (2023)
Yuan-Hsi Chou, Tyler Nowicki, Tor M. Aamodt
Treelet Prefetching For Ray Tracing. MICRO (2023)
Deval Shah, Tor M. Aamodt
Learning Label Encodings for Deep Regression. CoRR (2023)
Deval Shah, Tor M. Aamodt
Learning Label Encodings for Deep Regression. ICLR (2023)
Lufei Liu, Mohammadreza Saed, Yuan-Hsi Chou, Davit Grigoryan, Tyler Nowicki, Tor M. Aamodt
LumiBench: A Benchmark Suite for Hardware Ray Tracing. IISWC (2023)
Mohammadreza Saed, Yuan-Hsi Chou, Lufei Liu, Tyler Nowicki, Tor M. Aamodt
Vulkan-Sim: A GPU Architecture Simulator for Ray Tracing. MICRO (2022)
Deval Shah, Zi Yu Xue, Tor M. Aamodt
Label Encoding for Regression Networks. CoRR (2022)
Deval Shah, Zi Yu Xue, Tor M. Aamodt
Label Encoding for Regression Networks. ICLR (2022)
Jonathan S. Lew, Yunpeng Liu, Wenyi Gong, Negar Goli, R. David Evans, Tor M. Aamodt
Anticipating and eliminating redundant computations in accelerated sparse training. ISCA (2022)
R. David Evans, Tor M. Aamodt
AC-GC: Lossy Activation Compression with Guaranteed Convergence. NeurIPS (2021)
Deval Shah, Zi Yu Xue, Karthik Pattabiraman, Tor M. Aamodt
Characterizing and Improving the Resilience of Accelerators in Autonomous Robots. CoRR (2021)
Vijay Kandiah, Scott Peverelle, Mahmoud Khairy, Junrui Pan, Amogh Manjunath, Timothy G. Rogers, Tor M. Aamodt, Nikos Hardavellas
AccelWattch: A Power Modeling Framework for Modern GPUs. MICRO (2021)
Lufei Liu, Wesley Chang, Francois Demoullin, Yuan-Hsi Chou, Mohammadreza Saed, David Pankratz, Tyler Nowicki, Tor M. Aamodt
Intersection Prediction for Accelerated GPU Ray Tracing. MICRO (2021)
Md Aamir Raihan, Tor M. Aamodt
Sparse Weight Activation Training. CoRR (2020)
R. David Evans, Lufei Liu, Tor M. Aamodt
JPEG-ACT: Accelerating Deep Learning via Transform-based Lossy Compression. ISCA (2020)
Negar Goli, Tor M. Aamodt
ReSprop: Reuse Sparsified Backpropagation. CVPR (2020)
Mahmoud Khairy, Zhesheng Shen, Tor M. Aamodt, Timothy G. Rogers
Accel-Sim: An Extensible Simulation Framework for Validated GPU Modeling. ISCA (2020)
Jiho Kim, Sanghun Cho, Minsoo Rhu, Ali Bakhoda, Tor M. Aamodt, John Kim
Bandwidth Bottleneck in Network-on-Chip for High-Throughput Processors. PACT (2020)
Yuan-Hsi Chou, Christopher Ng, Shaylin Cattell, Jeremy Intan, Matthew D. Sinclair, Joseph Devietti, Timothy G. Rogers, Tor M. Aamodt
Deterministic Atomic Buffering. MICRO (2020)
Md Aamir Raihan, Tor M. Aamodt
Sparse Weight Activation Training. NeurIPS (2020)
Milad Mohammadi, Song Han, Ehsan Atoofian, Amirali Baniasadi, Tor M. Aamodt, William J. Dally
Energy Efficient On-Demand Dynamic Branch Prediction Models. IEEE Trans. Computers 69 (3) (2020)
Francois Demoullin, Ayub A. Gubran, Tor M. Aamodt
Hash-Based Ray Path Prediction: Skipping BVH Traversal Computation by Exploiting Ray Locality. CoRR (2019)
Jonathan Lew, Deval A. Shah, Suchita Pati, Shaylin Cattell, Mengchi Zhang, Amruth Sandhupatla, Christopher Ng, Negar Goli, Matthew D. Sinclair, Timothy G. Rogers, Tor M. Aamodt
Analyzing Machine Learning Workloads Using a Detailed GPU Simulator. ISPASS (2019)
Ayub A. Gubran, Felix Huang, Tor M. Aamodt
Surface Compression Using Dynamic Color Palettes. CoRR (2019)
Tayler Hicklin Hetherington, Maria Lubeznov, Deval Shah, Tor M. Aamodt
EDGE: Event-Driven GPU Execution. PACT (2019)
Md Aamir Raihan, Negar Goli, Tor M. Aamodt
Modeling Deep Learning Accelerator Enabled GPUs. ISPASS (2019)
Mahmoud Khairy, Akshay Jain, Tor M. Aamodt, Timothy G. Rogers
A Detailed Model for Contemporary GPU Memory Systems. ISPASS (2019)
Ayub A. Gubran, Tor M. Aamodt
Emerald: graphics modeling for SoC systems. ISCA (2019)
Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
Value-Based Deep-Learning Acceleration. IEEE Micro 38 (1) (2018)
Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Zissis Poulos, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger
Exploiting Typical Values to Accelerate Deep Learning. Computer 51 (5) (2018)
Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Raquel Urtasun, Andreas Moshovos
Proteus: Exploiting precision variability in deep neural networks. Parallel Comput. 73 (2018)
Ahmed ElTantawy, Tor M. Aamodt
Warp Scheduling for Fine-Grained Synchronization. HPCA (2018)
Mahmoud Khairy, Akshay Jain, Tor M. Aamodt, Timothy G. Rogers
Exploring Modern GPU Memory System Design Challenges through Accurate Modeling. CoRR (2018)
Jonathan Lew, Deval Shah, Suchita Pati, Shaylin Cattell, Mengchi Zhang, Amruth Sandhupatla, Christopher Ng, Negar Goli, Matthew D. Sinclair, Timothy G. Rogers, Tor M. Aamodt
Analyzing Machine Learning Workloads Using a Detailed GPU Simulator. CoRR (2018)
Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas, Sayeh Sharify, Mostafa Mahmoud, Tayler H. Hetherington, Milos Nikolic, Dylan Malone Stuart, Kevin Siu, Zissis Poulos, Tor M. Aamodt, Natalie D. Enright Jerger
Identifying and Exploiting Ineffectual Computations to Enable Hardware Acceleration of Deep Learning. NEWCAS (2018)
Md Aamir Raihan, Negar Goli, Tor M. Aamodt
Modeling Deep Learning Accelerator Enabled GPUs. CoRR (2018)
Shadi Assadikhomami, Jennifer Ongko, Tor M. Aamodt
A state machine block for high-level synthesis. FPT (2017)
Yatish Turakhia, Subhasis Das, Tor M. Aamodt, William J. Dally
HoLiSwap: Reducing Wire Energy in L1 Caches. CoRR (2017)
Milad Mohammadi, Tor M. Aamodt, William J. Dally
CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution Near In-Order Energy with Near Out-of-Order Performance. ACM Trans. Archit. Code Optim. 14 (4) (2017)
Ahmed ElTantawy, Tor M. Aamodt
MIMD synchronization on SIMT architectures. MICRO (2016)
Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Andreas Moshovos
Stripes: Bit-serial deep neural network computing. MICRO (2016)
Subhasis Das, Tor M. Aamodt, William J. Dally
Reuse Distance-Based Probabilistic Cache Replacement. ACM Trans. Archit. Code Optim. 12 (4) (2016)
Dongdong Li, Tor M. Aamodt
Inter-Core Locality Aware Memory Scheduling. IEEE Comput. Archit. Lett. 15 (1) (2016)
Jorge Albericio, Patrick Judd, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Andreas Moshovos
Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing. ISCA (2016)
Milad Mohammadi, Tor M. Aamodt, William J. Dally
CG-OoO: Energy-Efficient Coarse-Grain Out-of-Order Execution. CoRR (2016)
Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Andreas Moshovos
Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks. ICS (2016)
Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Raquel Urtasun, Andreas Moshovos
Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets. CoRR (2015)
Subhasis Das, Tor M. Aamodt, William J. Dally
SLIP: reducing wire energy in the memory hierarchy. ISCA (2015)
Milad Mohammadi, Song Han, Tor M. Aamodt, William J. Dally
On-Demand Dynamic Branch Prediction. IEEE Comput. Archit. Lett. 14 (1) (2015)
Tayler H. Hetherington, Mike O'Connor, Tor M. Aamodt
MemcachedGPU: scaling-up scale-out key-value stores. SoCC (2015)
Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt
Learning your limit: managing massively multithreaded caches through scheduling. Commun. ACM 57 (12) (2014)
Ahmed ElTantawy, Jessica Wenjie Ma, Mike O'Connor, Tor M. Aamodt
A scalable multi-path microarchitecture for efficient GPU control flow. HPCA (2014)
Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor, Tor M. Aamodt
Cache Coherence for GPU Architectures. IEEE Micro 34 (3) (2014)
Tor M. Aamodt
Scaling usable computing capability. ICSAMOS (2014)
Jingwen Leng, Tayler H. Hetherington, Ahmed ElTantawy, Syed Zohaib Gilani, Nam Sung Kim, Tor M. Aamodt, Vijay Janapa Reddi
GPUWattch: enabling energy optimizations in GPGPUs. ISCA (2013)
Hadi Jooybar, Wilson W. L. Fung, Mike O'Connor, Joseph Devietti, Tor M. Aamodt
GPUDet: a deterministic GPU architecture. ASPLOS (2013)
Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt
Cache-Conscious Thread Scheduling for Massively Multithreaded Processors. IEEE Micro 33 (3) (2013)
Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt
Divergence-aware warp scheduling. MICRO (2013)
Vitaly Zakharenko, Tor M. Aamodt, Andreas Moshovos
Characterizing the performance benefits of fused CPU/GPU systems using FusionSim. DATE (2013)
Wilson W. L. Fung, Tor M. Aamodt
Energy efficient GPU transactional memory via space-time optimizations. MICRO (2013)
Ali Bakhoda, John Kim, Tor M. Aamodt
Designing on-chip networks for throughput accelerators. ACM Trans. Archit. Code Optim. 10 (3) (2013)
Inderpreet Singh, Arrvindh Shriraman, Wilson W. L. Fung, Mike O'Connor, Tor M. Aamodt
Cache coherence for GPU architectures. HPCA (2013)
Xi E. Chen, Tor M. Aamodt
Modeling Cache Contention and Throughput of Multiprogrammed Manycore Processors. IEEE Trans. Computers 61 (7) (2012)
Marcel Gort, Flavio M. de Paula, Johnny J. W. Kuan, Tor M. Aamodt, Alan J. Hu, Steven J. E. Wilton, Jin Yang
Formal-Analysis-Based Trace Computation for Post-Silicon Debug. IEEE Trans. Very Large Scale Integr. Syst. 20 (11) (2012)
Jimmy Kwa, Tor M. Aamodt
Small virtual channel routers on FPGAs through block RAM sharing. FPT (2012)
Wilson Wai Lun Fung, Inderpreet Singh, Andrew Brownsword, Tor M. Aamodt
Kilo TM: Hardware Transactional Memory for GPU Architectures. IEEE Micro 32 (3) (2012)
Johnny J. W. Kuan, Tor M. Aamodt
Progressive-BackSpace: Efficient Predecessor Computation for Post-Silicon Debug. MTV (2012)
Timothy G. Rogers, Mike O'Connor, Tor M. Aamodt
Cache-Conscious Wavefront Scheduling. MICRO (2012)
Tayler H. Hetherington, Timothy G. Rogers, Lisa Hsu, Mike O'Connor, Tor M. Aamodt
Characterizing and evaluating a key-value store application on heterogeneous CPU-GPU systems. ISPASS (2012)
Xi E. Chen, Tor M. Aamodt
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs. ACM Trans. Archit. Code Optim. 8 (3) (2011)
Wilson W. L. Fung, Tor M. Aamodt
Thread block compaction for efficient SIMT control flow. HPCA (2011)
Wilson W. L. Fung, Inderpreet Singh, Andrew Brownsword, Tor M. Aamodt
Hardware transactional memory for GPU architectures. MICRO (2011)
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, Tor M. Aamodt
Visualizing complex dynamics in many-core accelerator architectures. ISPASS (2010)
Ali Bakhoda, John Kim, Tor M. Aamodt
Throughput-Effective On-Chip Networks for Manycore Accelerators. MICRO (2010)
Johnny J. W. Kuan, Steven J. E. Wilton, Tor M. Aamodt
Accelerating trace computation in post-silicon debug. ISQED (2010)
Ali Bakhoda, John Kim, Tor M. Aamodt
On-chip network design considerations for compute accelerators. PACT (2010)
Xi E. Chen, Tor M. Aamodt
A first-order fine-grained multithreaded throughput model. HPCA (2009)
Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, Henry Wong, Tor M. Aamodt
Analyzing CUDA workloads using a detailed GPU simulator. ISPASS (2009)
George L. Yuan, Ali Bakhoda, Tor M. Aamodt
Complexity effective memory access scheduling for many-core accelerator architectures. MICRO (2009)
Wilson W. L. Fung, Ivan Sham, George L. Yuan, Tor M. Aamodt
Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware. ACM Trans. Archit. Code Optim. 6 (2) (2009)
Tor M. Aamodt, Paul Chow
Compile-time and instruction-set methods for improving floating- to fixed-point conversion accuracy. ACM Trans. Embed. Comput. Syst. 7 (3) (2008)
Xi E. Chen, Tor M. Aamodt
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs. MICRO (2008)
Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aamodt, Jamison D. Collins, Perry H. Wang, Gautham N. Chinya, Ankur Khandelwal Groen, Hong Jiang, Hong Wang
Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor. PACT (2008)
Tor M. Aamodt, Paul Chow
Optimization of data prefetch helper threads with path-expression based statistical modeling. ICS (2007)
Wilson W. L. Fung, Ivan Sham, George L. Yuan, Tor M. Aamodt
Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow. MICRO (2007)
Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang, John Paul Shen
Hardware Support for Prescient Instruction Prefetch. HPCA (2004)
Tor M. Aamodt, Pedro Marcuello, Paul Chow, Antonio González, Per Hammarlund, Hong Wang, John Paul Shen
A framework for modeling and optimization of prescient instruction prefetch. SIGMETRICS (2003)
Tor M. Aamodt, Paul Chow
Embedded ISA support for enhanced floating-point to fixed-point ANSI-C compilation. CASES (2000)