Sign in
A high-level synthesis flow for custom instruction set extensions for application-specific processors.
Nagaraju Pothineni
Philip Brisk
Paolo Ienne
Anshul Kumar
Kolin Paul
Published in:
ASP-DAC (2010)
Keyphrases
</>
application specific
instruction set
high level synthesis
instruction set architecture
general purpose
parallel architecture
memory subsystem
design space exploration
level parallelism
file system
object oriented
efficient implementation