Panagiotis Athanasopoulos

Publication Activity (10 Years)

Years Active: 2008-2013
Publications (10 Years): 0

Top Topics

Multiprocessor Systems

Association Rules

Top Venues

IEEE J. Emerg. Sel. Topics Circuits Syst.

Publications

Tiansheng Zhang, Alessandro Cevrero, Giulia Beanato, Panagiotis Athanasopoulos, Ayse K. Coskun, Yusuf Leblebici
3D-MMC: a modular 3D multi-core architecture with efficient resource pooling. DATE (2013)
Giulia Beanato, Paolo Giovannini, Alessandro Cevrero, Panagiotis Athanasopoulos, Michael Zervas, Yuksel Temiz, Yusuf Leblebici
Design and Testing Strategies for Modular 3-D-Multiprocessor Systems Using Die-Level Through Silicon Via Technology. IEEE J. Emerg. Sel. Topics Circuits Syst. 2 (2) (2012)
Fengda Sun, Alessandro Cevrero, Panagiotis Athanasopoulos, Yusuf Leblebici
Design and feasibility of multi-Gb/s quasi-serial vertical interconnects based on TSVs for 3D ICs. VLSI-SoC (2010)
Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leblebici, Paolo Ienne
Memory organization and data layout for instruction set extensions with architecturally visible storage. ICCAD (2009)
Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Seyed-Hosein Attarzadeh-Niaki, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Philip Brisk, Yusuf Leblebici, Paolo Ienne
Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 2 (2) (2009)
Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Philip Brisk, Yusuf Leblebici, Paolo Ienne, Maurizio Skerlj
3D configuration caching for 2D FPGAs. FPGA (2009)
Hadi Parandeh-Afshar, Alessandro Cevrero, Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leblebici, Paolo Ienne
A flexible DSP block to enhance FPGA arithmetic performance. FPT (2009)
Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Maurizio Skerlj, Philip Brisk, Yusuf Leblebici, Paolo Ienne
Using 3D integration technology to realize multi-context FPGAs. FPL (2009)
Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne
Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. FPGA (2008)