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Switch folding: network-on-chip routers with time-multiplexed output ports.
Giorgos Dimitrakopoulos
N. Georgiadis
Chrysostomos Nicopoulos
Emmanouil Kalligeros
Published in:
DATE (2013)
Keyphrases
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network on chip
high speed
end to end
routing algorithm
load balancing
multi processor
network simulator
wireless sensor networks
response time
shortest path
data acquisition