Ioannis Seitanidis

Publication Activity (10 Years)

Years Active: 2015-2020
Publications (10 Years): 8

Top Topics

Network Traffic

Power Dissipation

Ibm Power Processor

Optimal Placement

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

IEEE Trans. Computers

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Dimitrios Mangiras, Apostolos Stefanidis, Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Timing-Driven Placement Optimization Facilitated by Timing-Compatibility Flip-Flop Clustering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (10) (2020)
Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Automatic Generation of Peak-Power Traffic for Networks-on-Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (1) (2019)
Ioannis Seitanidis, Giorgos Dimitrakopoulos, Pavlos M. Mattheakis, Laurent Masse-Navette, David G. Chinnery
Timing-Driven and Placement-Aware Multibit Register Composition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (8) (2019)
Ioannis Seitanidis, Giorgos Dimitrakopoulos, Pavlos M. Mattheakis, Laurent Masse-Navette, David G. Chinnery
Timing Driven Incremental Multi-Bit Register Composition Using a Placement-Aware ILP formulation. DAC (2017)
Anastasios Psarras, Junghee Lee, Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
PhaseNoC: Versatile Network Traffic Isolation Through TDM-Scheduled Virtual Channels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (5) (2016)
Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
Powermax: an automated methodology for generating peak-power traffic in networks-on-chip. NOCS (2016)
Anastasios Psarras, Ioannis Seitanidis, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
ShortPath: A Network-on-Chip Router with Fine-Grained Pipeline Bypassing. IEEE Trans. Computers 65 (10) (2016)
Ioannis Seitanidis, Anastasios Psarras, Kypros Chrysanthou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos
ElastiStore: Flexible Elastic Buffering for Virtual-Channel-Based Networks on Chip. IEEE Trans. Very Large Scale Integr. Syst. 23 (12) (2015)