David G. Chinnery

Publication Activity (10 Years)

Years Active: 2000-2023
Publications (10 Years): 12

Top Topics

Lower And Upper Bounds

Lagrangian Relaxation

Branch And Bound Algorithm

Parallel Programming

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

ACM Trans. Design Autom. Electr. Syst.

Publications

Dimitrios Mangiras, David G. Chinnery, Giorgos Dimitrakopoulos
Task-Based Parallel Programming for Gate Sizing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (4) (2023)
Iris Hui-Ru Jiang, David G. Chinnery, Gracieli Posser, Jens Lienig
Introduction to the Special Section on Advances in Physical Design Automation. ACM Trans. Design Autom. Electr. Syst. 28 (5) (2023)
Iris Hui-Ru Jiang, David G. Chinnery
EDA for Domain Specific Computing: An Introduction for the Panel. ISPD (2023)
David G. Chinnery, Ankur Sharma
Integrating LR Gate Sizing in an Industrial Place-and-Route Flow. ISPD (2022)
Apostolos Stefanidis, Dimitrios Mangiras, Chrysostomos Nicopoulos, David G. Chinnery, Giorgos Dimitrakopoulos
Autonomous Application of Netlist Transformations Inside Lagrangian Relaxation-Based Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (8) (2021)
Apostolos Stefanidis, Dimitrios Mangiras, Chrysostomos Nicopoulos, David G. Chinnery, Giorgos Dimitrakopoulos
Design Optimization by Fine-grained Interleaving of Local Netlist Transformations in Lagrangian Relaxation. ISPD (2020)
Ankur Sharma, David G. Chinnery, Tiago Reimann, Sarvesh Bhardwaj, Chris Chu
Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple Timing Calibrations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (7) (2020)
David G. Chinnery
Session details: Detailed Routing Contest Results. ISPD (2019)
Ankur Sharma, David G. Chinnery, Chris Chu
Lagrangian Relaxation Based Gate Sizing With Clock Skew Scheduling - A Fast and Effective Approach. ISPD (2019)
Ioannis Seitanidis, Giorgos Dimitrakopoulos, Pavlos M. Mattheakis, Laurent Masse-Navette, David G. Chinnery
Timing-Driven and Placement-Aware Multibit Register Composition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (8) (2019)
Ankur Sharma, David G. Chinnery, Shrirang Dhamdhere, Chris Chu
Rapid gate sizing with fewer iterations of Lagrangian Relaxation. ICCAD (2017)
Ioannis Seitanidis, Giorgos Dimitrakopoulos, Pavlos M. Mattheakis, Laurent Masse-Navette, David G. Chinnery
Timing Driven Incremental Multi-Bit Register Composition Using a Placement-Aware ILP formulation. DAC (2017)
Ankur Sharma, David G. Chinnery, Sarvesh Bhardwaj, Chris C. N. Chu
Fast Lagrangian Relaxation Based Gate Sizing using Multi-Threading. ICCAD (2015)
Ismail S. Bustany, David G. Chinnery, Joseph R. Shinnerl, Vladimir Yutsis
ISPD 2015 Benchmarks with Fence Regions and Routing Blockages for Detailed-Routing-Driven Placement. ISPD (2015)
Vladimir Yutsis, Ismail Bustany, David G. Chinnery, Joseph R. Shinnerl, Wen-Hao Liu
ISPD 2014 benchmarks with sub-45nm technology rules for detailed-routing-driven placement. ISPD (2014)
David G. Chinnery
High performance and low power design techniques for ASIC and custom in nanometer technologies. ISPD (2013)
David G. Chinnery, Kurt Keutzer
assignment. ISLPED (2005)
David G. Chinnery, Kurt Keutzer
Closing the power gap between ASIC and custom: an ASIC perspective. DAC (2005)
Masayuki Ito, David G. Chinnery, Kurt Keutzer
Low Power Multiplication Algorithm for Switching Activity Reduction through Operand Decomposition. ICCD (2003)
David Nguyen, Abhijit Davare, Michael Orshansky, David G. Chinnery, Brandon Thompson, Kurt Keutzer
Minimization of dynamic and static power through joint assignment of threshold voltages and sizing optimization. ISLPED (2003)
Serdar Tasiran, Farzan Fallah, David G. Chinnery, Scott J. Weber, Kurt Keutzer
A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage. ICCD (2001)
David G. Chinnery, Borivoje Nikolic, Kurt Keutzer
Achieving 550Mhz in an ASIC Methodology. DAC (2001)
David G. Chinnery, Kurt Keutzer
Closing the gap between ASIC and custom: an ASIC perspective. DAC (2000)