Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple Timing Calibrations.
Ankur SharmaDavid G. ChinneryTiago ReimannSarvesh BhardwajChris ChuPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
Keyphrases
- lagrangian relaxation
- integer programming
- lower bound
- column generation
- lower and upper bounds
- branch and bound algorithm
- dynamic programming
- feasible solution
- linear programming
- data structure
- np hard
- mixed integer programming
- valid inequalities
- network design problem
- relaxation algorithm
- dual decomposition
- mixed integer linear programs