Tiago Reimann

Publication Activity (10 Years)

Years Active: 2009-2020
Publications (10 Years): 2

Top Topics

Relaxation Algorithm

Lagrangian Relaxation

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Ankur Sharma, David G. Chinnery, Tiago Reimann, Sarvesh Bhardwaj, Chris Chu
Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple Timing Calibrations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (7) (2020)
Tiago Reimann, Cliff C. N. Sze, Ricardo Reis
Challenges of cell selection algorithms in industrial high performance microprocessor designs. Integr. 52 (2016)
Tiago Reimann, Cliff C. N. Sze, Ricardo Reis
Gate sizing and threshold voltage assignment for high performance microprocessor designs. ASP-DAC (2015)
Guilherme Flach, Tiago Reimann, Gracieli Posser, Marcelo O. Johann, Ricardo Reis
Effective Method for Simultaneous Gate Sizing and $V$ th Assignment Using Lagrangian Relaxation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (4) (2014)
Leandro Nunes, Tiago Reimann, Ricardo Reis
GR-PA: A cost pre-allocation model for global routing. VLSI-SoC (2013)
Guilherme Flach, Tiago Reimann, Gracieli Posser, Marcelo O. Johann, Ricardo Reis
Simultaneous gate sizing and Vth assignment using Lagrangian Relaxation and delay sensitivities. ISVLSI (2013)
Tiago Reimann, Gracieli Posser, Guilherme Flach, Marcelo O. Johann, Ricardo Reis
Simultaneous gate sizing and Vt assignment using Fanin/Fanout ratio and Simulated Annealing. ISCAS (2013)
Glauco Borges Valim dos Santos, Tiago Reimann, Marcelo O. Johann, Ricardo Reis
The Fidelity Property of the Elmore Delay Model in actual comparison of routing algorithms. ICCD (2010)
Tiago Reimann, Glauco B. V. dos Santos, Ricardo A. L. Reis
Routing algorithms performance in different routing scopes. ICECS (2010)
Glauco B. V. dos Santos, Tiago Reimann, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis
On the accuracy of Elmore-based Delay Models. ICECS (2009)